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Instruction prefetch feature is by default enabled during core release. This patch add support of disabling instruction prefetch by setting core mask in PPA. Here each core mask bit represents a core and prefetch is disabled at the time of core release. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
21 lines
745 B
Plaintext
21 lines
745 B
Plaintext
Core instruction prefetch disable
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To disable instruction prefetch of core; hwconfig needs to be updated.
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for e.g.
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setenv hwconfig 'fsl_ddr:bank_intlv=auto;core_prefetch:disable=0x02'
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Here 0x02 can be replaced with any valid value except Mask[0] bit. It
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represents 64 bit mask. The 64-bit Mask has one bit for each core.
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Mask[0] = core0
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Mask[1] = core1
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Mask[2] = core2
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etc
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If the bit is set ('b1) in the mask, then prefetch is disabled for
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that core when it is released from reset.
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core0 prefetch should not be disabled i.e. Mask[0] should never be set.
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Setting Mask[0] may lead to undefined behavior.
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Once disabled, prefetch remains disabled until the next reset.
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There is no function to re-enable prefetch.
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