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https://github.com/brain-hackers/u-boot-brain
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![Marek Vasut](/assets/img/avatar_default.png)
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Oliver Brown <obrown@adventnetworks.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: U-Boot DM <u-boot-dm@lists.denx.de>
181 lines
3.9 KiB
C
181 lines
3.9 KiB
C
/*
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* TNETV107X: Watchdog timer implementation (for reset)
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#define MAX_DIV 0xFFFE0001
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struct wdt_regs {
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u32 kick_lock;
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#define KICK_LOCK_1 0x5555
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#define KICK_LOCK_2 0xaaaa
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u32 kick;
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u32 change_lock;
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#define CHANGE_LOCK_1 0x6666
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#define CHANGE_LOCK_2 0xbbbb
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u32 change;
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u32 disable_lock;
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#define DISABLE_LOCK_1 0x7777
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#define DISABLE_LOCK_2 0xcccc
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#define DISABLE_LOCK_3 0xdddd
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u32 disable;
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u32 prescale_lock;
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#define PRESCALE_LOCK_1 0x5a5a
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#define PRESCALE_LOCK_2 0xa5a5
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u32 prescale;
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};
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static struct wdt_regs* regs = (struct wdt_regs *)TNETV107X_WDT0_ARM_BASE;
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#define wdt_reg_read(reg) __raw_readl(®s->reg)
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#define wdt_reg_write(reg, val) __raw_writel((val), ®s->reg)
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static int write_prescale_reg(unsigned long prescale_value)
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{
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wdt_reg_write(prescale_lock, PRESCALE_LOCK_1);
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if ((wdt_reg_read(prescale_lock) & 0x3) != 0x1)
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return -1;
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wdt_reg_write(prescale_lock, PRESCALE_LOCK_2);
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if ((wdt_reg_read(prescale_lock) & 0x3) != 0x3)
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return -1;
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wdt_reg_write(prescale, prescale_value);
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return 0;
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}
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static int write_change_reg(unsigned long initial_timer_value)
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{
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wdt_reg_write(change_lock, CHANGE_LOCK_1);
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if ((wdt_reg_read(change_lock) & 0x3) != 0x1)
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return -1;
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wdt_reg_write(change_lock, CHANGE_LOCK_2);
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if ((wdt_reg_read(change_lock) & 0x3) != 0x3)
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return -1;
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wdt_reg_write(change, initial_timer_value);
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return 0;
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}
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static int wdt_control(unsigned long disable_value)
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{
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wdt_reg_write(disable_lock, DISABLE_LOCK_1);
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if ((wdt_reg_read(disable_lock) & 0x3) != 0x1)
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return -1;
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wdt_reg_write(disable_lock, DISABLE_LOCK_2);
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if ((wdt_reg_read(disable_lock) & 0x3) != 0x2)
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return -1;
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wdt_reg_write(disable_lock, DISABLE_LOCK_3);
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if ((wdt_reg_read(disable_lock) & 0x3) != 0x3)
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return -1;
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wdt_reg_write(disable, disable_value);
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return 0;
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}
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static int wdt_set_period(unsigned long msec)
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{
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unsigned long change_value, count_value;
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unsigned long prescale_value = 1;
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unsigned long refclk_khz, maxdiv;
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int ret;
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refclk_khz = clk_get_rate(TNETV107X_LPSC_WDT_ARM);
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maxdiv = (MAX_DIV / refclk_khz);
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if ((!msec) || (msec > maxdiv))
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return -1;
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count_value = refclk_khz * msec;
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if (count_value > 0xffff) {
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change_value = count_value / 0xffff + 1;
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prescale_value = count_value / change_value;
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} else {
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change_value = count_value;
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}
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ret = write_prescale_reg(prescale_value - 1);
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if (ret)
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return ret;
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ret = write_change_reg(change_value);
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if (ret)
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return ret;
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return 0;
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}
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unsigned long last_wdt = -1;
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int wdt_start(unsigned long msecs)
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{
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int ret;
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ret = wdt_control(0);
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if (ret)
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return ret;
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ret = wdt_set_period(msecs);
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if (ret)
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return ret;
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ret = wdt_control(1);
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if (ret)
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return ret;
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ret = wdt_kick();
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last_wdt = msecs;
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return ret;
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}
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int wdt_stop(void)
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{
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last_wdt = -1;
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return wdt_control(0);
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}
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int wdt_kick(void)
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{
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wdt_reg_write(kick_lock, KICK_LOCK_1);
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if ((wdt_reg_read(kick_lock) & 0x3) != 0x1)
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return -1;
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wdt_reg_write(kick_lock, KICK_LOCK_2);
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if ((wdt_reg_read(kick_lock) & 0x3) != 0x3)
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return -1;
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wdt_reg_write(kick, 1);
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return 0;
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}
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void reset_cpu(ulong addr)
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{
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clk_enable(TNETV107X_LPSC_WDT_ARM);
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wdt_start(1);
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wdt_kick();
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}
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