mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-15 14:43:49 +09:00
![Simon Glass](/assets/img/avatar_default.png)
After some thought, I believe there is an unfortunate naming flaw in binman. Entries have a position and size, but now that we support hierarchical sections it is unclear whether a position should be an absolute position within the image, or a relative position within its parent section. At present 'position' actually means the relative position. This indicates a need for an 'image position' for code that wants to find the location of an entry without having to do calculations back through parents to discover this image position. A better name for the current 'position' or 'pos' is 'offset'. It is not always an absolute position, but it is always an offset from its parent offset. It is unfortunate to rename this concept now, 18 months after binman was introduced. However I believe it is the right thing to do. The impact is mostly limited to binman itself and a few changes to in-tree users to binman: tegra sunxi x86 The change makes old binman definitions (e.g. downstream or out-of-tree) incompatible if they use the 'pos = <...>' property. Later work will adjust binman to generate an error when it is used. Signed-off-by: Simon Glass <sjg@chromium.org>
92 lines
1.6 KiB
Plaintext
92 lines
1.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <config.h>
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#ifdef CONFIG_ROM_SIZE
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/ {
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binman {
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filename = "u-boot.rom";
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end-at-4gb;
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sort-by-offset;
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pad-byte = <0xff>;
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size = <CONFIG_ROM_SIZE>;
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#ifdef CONFIG_HAVE_INTEL_ME
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intel-descriptor {
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filename = CONFIG_FLASH_DESCRIPTOR_FILE;
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};
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intel-me {
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filename = CONFIG_INTEL_ME_FILE;
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};
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#endif
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#ifdef CONFIG_SPL
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u-boot-spl-with-ucode-ptr {
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offset = <CONFIG_SPL_TEXT_BASE>;
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};
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u-boot-dtb-with-ucode2 {
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type = "u-boot-dtb-with-ucode";
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};
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u-boot {
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offset = <0xfff00000>;
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};
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#else
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u-boot-with-ucode-ptr {
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offset = <CONFIG_SYS_TEXT_BASE>;
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};
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#endif
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u-boot-dtb-with-ucode {
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};
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u-boot-ucode {
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align = <16>;
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};
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#ifdef CONFIG_HAVE_MRC
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intel-mrc {
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offset = <CONFIG_X86_MRC_ADDR>;
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};
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#endif
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#ifdef CONFIG_HAVE_FSP
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intel-fsp {
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filename = CONFIG_FSP_FILE;
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offset = <CONFIG_FSP_ADDR>;
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};
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#endif
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#ifdef CONFIG_HAVE_CMC
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intel-cmc {
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filename = CONFIG_CMC_FILE;
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offset = <CONFIG_CMC_ADDR>;
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};
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#endif
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#ifdef CONFIG_HAVE_VGA_BIOS
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intel-vga {
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filename = CONFIG_VGA_BIOS_FILE;
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offset = <CONFIG_VGA_BIOS_ADDR>;
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};
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#endif
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#ifdef CONFIG_HAVE_VBT
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intel-vbt {
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filename = CONFIG_VBT_FILE;
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offset = <CONFIG_VBT_ADDR>;
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};
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#endif
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#ifdef CONFIG_HAVE_REFCODE
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intel-refcode {
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offset = <CONFIG_X86_REFCODE_ADDR>;
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};
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#endif
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#ifdef CONFIG_SPL
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x86-start16-spl {
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offset = <CONFIG_SYS_X86_START16>;
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};
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#else
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x86-start16 {
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offset = <CONFIG_SYS_X86_START16>;
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};
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#endif
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};
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};
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#endif
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