mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-09 04:36:16 +09:00
e6f66ec0e7
At present we go through various contortions to store the I2C's chip address in its private data. This only exists when the chip is active so must be set up when it is probed. Until the device is probed we don't actually record what address it will appear on. However, now that we can support per-child platform data, we can use that instead. This allows us to set up the address when the child is bound, and avoid the messy contortions. Unfortunately this is a fairly large change and it seems to be difficult to break it down further. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
96 lines
1.8 KiB
C
96 lines
1.8 KiB
C
/*
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* Simulate an I2C port
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*
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* Copyright (c) 2014 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <i2c.h>
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#include <asm/test.h>
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#include <dm/lists.h>
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#include <dm/device-internal.h>
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#include <dm/root.h>
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DECLARE_GLOBAL_DATA_PTR;
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struct dm_sandbox_i2c_emul_priv {
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struct udevice *emul;
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};
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static int get_emul(struct udevice *dev, struct udevice **devp,
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struct dm_i2c_ops **opsp)
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{
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struct dm_i2c_chip *plat;
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int ret;
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*devp = NULL;
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*opsp = NULL;
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plat = dev_get_parent_platdata(dev);
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if (!plat->emul) {
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ret = dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset,
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false);
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if (ret)
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return ret;
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ret = device_get_child(dev, 0, &plat->emul);
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if (ret)
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return ret;
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}
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*devp = plat->emul;
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*opsp = i2c_get_ops(plat->emul);
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return 0;
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}
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static int sandbox_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
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int nmsgs)
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{
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struct dm_i2c_bus *i2c = bus->uclass_priv;
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struct dm_i2c_ops *ops;
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struct udevice *emul, *dev;
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bool is_read;
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int ret;
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/* Special test code to return success but with no emulation */
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if (msg->addr == SANDBOX_I2C_TEST_ADDR)
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return 0;
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ret = i2c_get_chip(bus, msg->addr, 1, &dev);
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if (ret)
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return ret;
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ret = get_emul(dev, &emul, &ops);
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if (ret)
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return ret;
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/*
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* For testing, don't allow writing above 100KHz for writes and
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* 400KHz for reads
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*/
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is_read = nmsgs > 1;
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if (i2c->speed_hz > (is_read ? 400000 : 100000))
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return -EINVAL;
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return ops->xfer(emul, msg, nmsgs);
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}
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static const struct dm_i2c_ops sandbox_i2c_ops = {
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.xfer = sandbox_i2c_xfer,
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};
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static const struct udevice_id sandbox_i2c_ids[] = {
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{ .compatible = "sandbox,i2c" },
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{ }
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};
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U_BOOT_DRIVER(i2c_sandbox) = {
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.name = "i2c_sandbox",
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.id = UCLASS_I2C,
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.of_match = sandbox_i2c_ids,
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.ops = &sandbox_i2c_ops,
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};
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