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https://github.com/brain-hackers/u-boot-brain
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e6e505b93c
Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while most of it is just generic code that could as well be used on an AArch64 SoC. Move all files that are not really tied to armv7 into a new mach-sunxi directory. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
69 lines
1.7 KiB
C
69 lines
1.7 KiB
C
/*
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* sun9i specific clock code
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*
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* (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/prcm.h>
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#include <asm/arch/sys_proto.h>
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void clock_init_uart(void)
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{
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struct sunxi_ccm_reg *const ccm =
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(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
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/* open the clock for uart */
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setbits_le32(&ccm->apb1_gate,
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CLK_GATE_OPEN << (APB1_GATE_UART_SHIFT +
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CONFIG_CONS_INDEX - 1));
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/* deassert uart reset */
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setbits_le32(&ccm->apb1_reset_cfg,
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1 << (APB1_RESET_UART_SHIFT +
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CONFIG_CONS_INDEX - 1));
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/* Dup with clock_init_safe(), drop once sun9i SPL support lands */
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writel(PLL4_CFG_DEFAULT, &ccm->pll4_periph0_cfg);
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}
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int clock_twi_onoff(int port, int state)
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{
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struct sunxi_ccm_reg *const ccm =
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(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
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if (port > 4)
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return -1;
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/* set the apb reset and clock gate for twi */
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if (state) {
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setbits_le32(&ccm->apb1_gate,
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CLK_GATE_OPEN << (APB1_GATE_TWI_SHIFT + port));
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setbits_le32(&ccm->apb1_reset_cfg,
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1 << (APB1_RESET_TWI_SHIFT + port));
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} else {
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clrbits_le32(&ccm->apb1_reset_cfg,
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1 << (APB1_RESET_TWI_SHIFT + port));
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clrbits_le32(&ccm->apb1_gate,
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CLK_GATE_OPEN << (APB1_GATE_TWI_SHIFT + port));
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}
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return 0;
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}
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unsigned int clock_get_pll4_periph0(void)
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{
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struct sunxi_ccm_reg *const ccm =
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(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
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uint32_t rval = readl(&ccm->pll4_periph0_cfg);
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int n = ((rval & CCM_PLL4_CTRL_N_MASK) >> CCM_PLL4_CTRL_N_SHIFT);
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int p = ((rval & CCM_PLL4_CTRL_P_MASK) >> CCM_PLL4_CTRL_P_SHIFT);
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int m = ((rval & CCM_PLL4_CTRL_M_MASK) >> CCM_PLL4_CTRL_M_SHIFT) + 1;
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const int k = 1;
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return ((24000000 * n * k) >> p) / m;
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}
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