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![Aneesh V](/assets/img/avatar_default.png)
- Provide alternate implementations of board_init_f() board_init_r() for OMAP spl. - Provide linker script - Initialize global data - Add serial console support - Update CONFIG_SYS_TEXT_BASE to allow for SPL's bss and move it to board config header from config.mk Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
262 lines
6.1 KiB
C
262 lines
6.1 KiB
C
/*
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*
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* Common functions for OMAP4 based boards
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*
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* (C) Copyright 2010
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* Texas Instruments, <www.ti.com>
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*
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* Author :
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* Aneesh V <aneesh@ti.com>
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* Steve Sakoman <steve@sakoman.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/armv7.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/sizes.h>
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#include <asm/arch/emif.h>
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#include "omap4_mux_data.h"
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DECLARE_GLOBAL_DATA_PTR;
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u32 *const omap4_revision = (u32 *)OMAP4_SRAM_SCRATCH_OMAP4_REV;
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void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
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{
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int i;
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struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
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for (i = 0; i < size; i++, pad++)
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writew(pad->val, base + pad->offset);
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}
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static void set_muxconf_regs_essential(void)
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{
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do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_essential,
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sizeof(core_padconf_array_essential) /
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sizeof(struct pad_conf_entry));
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do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_essential,
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sizeof(wkup_padconf_array_essential) /
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sizeof(struct pad_conf_entry));
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}
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static void set_mux_conf_regs(void)
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{
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switch (omap4_hw_init_context()) {
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case OMAP_INIT_CONTEXT_SPL:
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set_muxconf_regs_essential();
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break;
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case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
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set_muxconf_regs_non_essential();
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break;
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case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
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case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
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set_muxconf_regs_essential();
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set_muxconf_regs_non_essential();
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break;
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}
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}
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static u32 cortex_a9_rev(void)
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{
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unsigned int rev;
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/* Read Main ID Register (MIDR) */
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asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
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return rev;
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}
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static void init_omap4_revision(void)
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{
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/*
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* For some of the ES2/ES1 boards ID_CODE is not reliable:
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* Also, ES1 and ES2 have different ARM revisions
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* So use ARM revision for identification
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*/
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unsigned int arm_rev = cortex_a9_rev();
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switch (arm_rev) {
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case MIDR_CORTEX_A9_R0P1:
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*omap4_revision = OMAP4430_ES1_0;
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break;
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case MIDR_CORTEX_A9_R1P2:
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switch (readl(CONTROL_ID_CODE)) {
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case OMAP4_CONTROL_ID_CODE_ES2_0:
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*omap4_revision = OMAP4430_ES2_0;
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break;
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case OMAP4_CONTROL_ID_CODE_ES2_1:
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*omap4_revision = OMAP4430_ES2_1;
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break;
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case OMAP4_CONTROL_ID_CODE_ES2_2:
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*omap4_revision = OMAP4430_ES2_2;
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break;
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default:
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*omap4_revision = OMAP4430_ES2_0;
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break;
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}
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break;
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case MIDR_CORTEX_A9_R1P3:
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*omap4_revision = OMAP4430_ES2_3;
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break;
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default:
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*omap4_revision = OMAP4430_SILICON_ID_INVALID;
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break;
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}
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}
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void omap_rev_string(char *omap4_rev_string)
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{
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u32 omap4_rev = omap_revision();
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u32 omap4_variant = (omap4_rev & 0xFFFF0000) >> 16;
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u32 major_rev = (omap4_rev & 0x00000F00) >> 8;
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u32 minor_rev = (omap4_rev & 0x000000F0) >> 4;
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sprintf(omap4_rev_string, "OMAP%x ES%x.%x", omap4_variant, major_rev,
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minor_rev);
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}
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/*
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* Routine: s_init
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* Description: Does early system init of watchdog, muxing, andclocks
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* Watchdog disable is done always. For the rest what gets done
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* depends on the boot mode in which this function is executed
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* 1. s_init of SPL running from SRAM
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* 2. s_init of U-Boot running from FLASH
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* 3. s_init of U-Boot loaded to SDRAM by SPL
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* 4. s_init of U-Boot loaded to SDRAM by ROM code using the
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* Configuration Header feature
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* Please have a look at the respective functions to see what gets
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* done in each of these cases
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* This function is called with SRAM stack.
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*/
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void s_init(void)
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{
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init_omap4_revision();
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watchdog_init();
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set_mux_conf_regs();
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#ifdef CONFIG_SPL_BUILD
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preloader_console_init();
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#endif
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prcm_init();
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#ifdef CONFIG_SPL_BUILD
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/* For regular u-boot sdram_init() is called from dram_init() */
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sdram_init();
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#endif
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}
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/*
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* Routine: wait_for_command_complete
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* Description: Wait for posting to finish on watchdog
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*/
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void wait_for_command_complete(struct watchdog *wd_base)
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{
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int pending = 1;
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do {
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pending = readl(&wd_base->wwps);
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} while (pending);
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}
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/*
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* Routine: watchdog_init
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* Description: Shut down watch dogs
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*/
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void watchdog_init(void)
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{
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struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
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writel(WD_UNLOCK1, &wd2_base->wspr);
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wait_for_command_complete(wd2_base);
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writel(WD_UNLOCK2, &wd2_base->wspr);
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}
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/*
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* This function finds the SDRAM size available in the system
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* based on DMM section configurations
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* This is needed because the size of memory installed may be
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* different on different versions of the board
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*/
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u32 omap4_sdram_size(void)
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{
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u32 section, i, total_size = 0, size, addr;
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for (i = 0; i < 4; i++) {
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section = __raw_readl(OMAP44XX_DMM_LISA_MAP_BASE + i*4);
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addr = section & OMAP44XX_SYS_ADDR_MASK;
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/* See if the address is valid */
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if ((addr >= OMAP44XX_DRAM_ADDR_SPACE_START) &&
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(addr < OMAP44XX_DRAM_ADDR_SPACE_END)) {
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size = ((section & OMAP44XX_SYS_SIZE_MASK) >>
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OMAP44XX_SYS_SIZE_SHIFT);
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size = 1 << size;
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size *= SZ_16M;
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total_size += size;
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}
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}
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return total_size;
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}
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/*
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* Routine: dram_init
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* Description: sets uboots idea of sdram size
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*/
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int dram_init(void)
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{
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sdram_init();
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gd->ram_size = omap4_sdram_size();
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return 0;
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}
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/*
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* Print board information
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*/
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int checkboard(void)
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{
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puts(sysinfo.board_string);
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return 0;
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}
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/*
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* This function is called by start_armboot. You can reliably use static
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* data. Any boot-time function that require static data should be
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* called from here
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*/
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int arch_cpu_init(void)
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{
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return 0;
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}
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#ifndef CONFIG_SYS_L2CACHE_OFF
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void v7_outer_cache_enable(void)
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{
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set_pl310_ctrl_reg(1);
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}
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void v7_outer_cache_disable(void)
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{
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set_pl310_ctrl_reg(0);
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}
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#endif
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