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https://github.com/brain-hackers/u-boot-brain
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![Mike Frysinger](/assets/img/avatar_default.png)
The performance difference from doing an 8 bit DMA memcpy vs an optimized core memcpy can be pretty big when you add in the overhead of setting up the MDMA registers, cache flushes, etc... So only use dma_memcpy() when we actually require it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
216 lines
4.9 KiB
C
216 lines
4.9 KiB
C
/*
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* U-boot - blackfin_local.h
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*
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* Copyright (c) 2005-2007 Analog Devices Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#ifndef __BLACKFIN_LOCAL_H__
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#define __BLACKFIN_LOCAL_H__
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#define LO(con32) ((con32) & 0xFFFF)
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#define lo(con32) ((con32) & 0xFFFF)
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#define HI(con32) (((con32) >> 16) & 0xFFFF)
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#define hi(con32) (((con32) >> 16) & 0xFFFF)
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#define OFFSET_(x) (x & 0x0000FFFF)
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#define MK_BMSK_(x) (1 << x)
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/* Ideally this should be USEC not MSEC, but the USEC multiplication
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* likes to overflow 32bit quantities which is all our assembler
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* currently supports ;(
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*/
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#define USEC_PER_MSEC 1000
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#define MSEC_PER_SEC 1000
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#define BFIN_SCLK (100000000)
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#define SCLK_TO_MSEC(sclk) ((MSEC_PER_SEC * ((sclk) / USEC_PER_MSEC)) / (BFIN_SCLK / USEC_PER_MSEC))
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#define MSEC_TO_SCLK(msec) ((((BFIN_SCLK / USEC_PER_MSEC) * (msec)) / MSEC_PER_SEC) * USEC_PER_MSEC)
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#define L1_CACHE_SHIFT 5
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#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
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#include <asm/linkage.h>
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#ifndef __ASSEMBLY__
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# ifdef SHARED_RESOURCES
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# include <asm/shared_resources.h>
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# endif
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# include <linux/types.h>
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extern u_long get_vco(void);
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extern u_long get_cclk(void);
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extern u_long get_sclk(void);
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# define bfin_revid() (*pCHIPID >> 28)
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extern void blackfin_icache_flush_range(const void *, const void *);
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extern void blackfin_dcache_flush_range(const void *, const void *);
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extern void blackfin_icache_dcache_flush_range(const void *, const void *);
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extern void blackfin_dcache_flush_invalidate_range(const void *, const void *);
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/* Use DMA to move data from on chip to external memory. The L1 instruction
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* regions can only be accessed via DMA, so if the address in question is in
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* that region, make sure we attempt to DMA indirectly.
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*/
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# define addr_bfin_on_chip_mem(addr) (((unsigned long)(addr) & 0xFFF00000) == 0xFFA00000)
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# include <asm/system.h>
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#if ANOMALY_05000198
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# define NOP_PAD_ANOMALY_05000198 "nop;"
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#else
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# define NOP_PAD_ANOMALY_05000198
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#endif
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#define bfin_read8(addr) ({ \
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uint8_t __v; \
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__asm__ __volatile__( \
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NOP_PAD_ANOMALY_05000198 \
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"%0 = b[%1] (z);" \
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: "=d" (__v) \
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: "a" (addr) \
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); \
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__v; })
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#define bfin_read16(addr) ({ \
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uint16_t __v; \
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__asm__ __volatile__( \
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NOP_PAD_ANOMALY_05000198 \
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"%0 = w[%1] (z);" \
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: "=d" (__v) \
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: "a" (addr) \
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); \
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__v; })
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#define bfin_read32(addr) ({ \
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uint32_t __v; \
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__asm__ __volatile__( \
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NOP_PAD_ANOMALY_05000198 \
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"%0 = [%1];" \
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: "=d" (__v) \
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: "a" (addr) \
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); \
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__v; })
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#define bfin_readPTR(addr) bfin_read32(addr)
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#define bfin_write8(addr, val) \
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__asm__ __volatile__( \
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NOP_PAD_ANOMALY_05000198 \
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"b[%0] = %1;" \
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: \
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: "a" (addr), "d" (val) \
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: "memory" \
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)
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#define bfin_write16(addr, val) \
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__asm__ __volatile__( \
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NOP_PAD_ANOMALY_05000198 \
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"w[%0] = %1;" \
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: \
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: "a" (addr), "d" (val) \
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: "memory" \
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)
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#define bfin_write32(addr, val) \
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__asm__ __volatile__( \
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NOP_PAD_ANOMALY_05000198 \
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"[%0] = %1;" \
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: \
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: "a" (addr), "d" (val) \
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: "memory" \
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)
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#define bfin_writePTR(addr, val) bfin_write32(addr, val)
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/* SSYNC implementation for C file */
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static inline void SSYNC(void)
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{
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int _tmp;
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if (ANOMALY_05000312)
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__asm__ __volatile__(
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"cli %0;"
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"nop;"
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"nop;"
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"ssync;"
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"sti %0;"
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: "=d" (_tmp)
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);
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else if (ANOMALY_05000244)
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__asm__ __volatile__(
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"nop;"
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"nop;"
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"nop;"
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"ssync;"
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);
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else
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__asm__ __volatile__("ssync;");
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}
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/* CSYNC implementation for C file */
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static inline void CSYNC(void)
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{
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int _tmp;
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if (ANOMALY_05000312)
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__asm__ __volatile__(
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"cli %0;"
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"nop;"
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"nop;"
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"csync;"
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"sti %0;"
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: "=d" (_tmp)
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);
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else if (ANOMALY_05000244)
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__asm__ __volatile__(
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"nop;"
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"nop;"
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"nop;"
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"csync;"
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);
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else
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__asm__ __volatile__("csync;");
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}
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#else /* __ASSEMBLY__ */
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/* SSYNC & CSYNC implementations for assembly files */
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#define ssync(x) SSYNC(x)
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#define csync(x) CSYNC(x)
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#if ANOMALY_05000312
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#define SSYNC(scratch) cli scratch; nop; nop; SSYNC; sti scratch;
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#define CSYNC(scratch) cli scratch; nop; nop; CSYNC; sti scratch;
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#elif ANOMALY_05000244
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#define SSYNC(scratch) nop; nop; nop; SSYNC;
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#define CSYNC(scratch) nop; nop; nop; CSYNC;
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#else
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#define SSYNC(scratch) SSYNC;
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#define CSYNC(scratch) CSYNC;
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#endif /* ANOMALY_05000312 & ANOMALY_05000244 handling */
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#endif /* __ASSEMBLY__ */
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#endif
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