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https://github.com/brain-hackers/u-boot-brain
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728d21b8c7
Remove setting tapdelays for different speeds separately. Instead use the ITAP and OTAP delay values which are read from the device tree. If the DT does not contain tap delay values, the predefined values will be used for the same. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
99 lines
2.6 KiB
C
99 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Xilinx ZynqMP SoC Tap Delay Programming
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*
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* Copyright (C) 2018 Xilinx, Inc.
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*/
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#include <common.h>
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#include <zynqmp_tap_delay.h>
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#include <asm/arch/sys_proto.h>
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#include <linux/delay.h>
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#include <mmc.h>
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#define SD_DLL_CTRL 0xFF180358
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#define SD_ITAP_DLY 0xFF180314
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#define SD_OTAP_DLY 0xFF180318
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#define SD0_DLL_RST_MASK 0x00000004
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#define SD0_DLL_RST 0x00000004
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#define SD1_DLL_RST_MASK 0x00040000
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#define SD1_DLL_RST 0x00040000
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#define SD0_ITAPCHGWIN_MASK 0x00000200
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#define SD0_ITAPCHGWIN 0x00000200
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#define SD1_ITAPCHGWIN_MASK 0x02000000
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#define SD1_ITAPCHGWIN 0x02000000
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#define SD0_ITAPDLYENA_MASK 0x00000100
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#define SD0_ITAPDLYENA 0x00000100
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#define SD1_ITAPDLYENA_MASK 0x01000000
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#define SD1_ITAPDLYENA 0x01000000
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#define SD0_ITAPDLYSEL_MASK 0x000000FF
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#define SD1_ITAPDLYSEL_MASK 0x00FF0000
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#define SD0_OTAPDLYSEL_MASK 0x0000003F
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#define SD1_OTAPDLYSEL_MASK 0x003F0000
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void zynqmp_dll_reset(u8 deviceid)
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{
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/* Issue DLL Reset */
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if (deviceid == 0)
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zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK,
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SD0_DLL_RST);
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else
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zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK,
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SD1_DLL_RST);
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mdelay(1);
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/* Release DLL Reset */
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if (deviceid == 0)
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zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, 0x0);
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else
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zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, 0x0);
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}
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void arasan_zynqmp_set_tapdelay(u8 deviceid, u32 itap_delay, u32 otap_delay)
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{
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if (deviceid == 0) {
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zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK,
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SD0_DLL_RST);
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/* Program ITAP */
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if (itap_delay) {
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zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK,
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SD0_ITAPCHGWIN);
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zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPDLYENA_MASK,
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SD0_ITAPDLYENA);
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zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPDLYSEL_MASK,
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itap_delay);
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zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK,
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0x0);
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}
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/* Program OTAP */
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if (otap_delay)
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zynqmp_mmio_write(SD_OTAP_DLY, SD0_OTAPDLYSEL_MASK,
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otap_delay);
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zynqmp_mmio_write(SD_DLL_CTRL, SD0_DLL_RST_MASK, 0x0);
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} else {
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zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK,
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SD1_DLL_RST);
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/* Program ITAP */
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if (itap_delay) {
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zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK,
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SD1_ITAPCHGWIN);
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zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPDLYENA_MASK,
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SD1_ITAPDLYENA);
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zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPDLYSEL_MASK,
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(itap_delay << 16));
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zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK,
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0x0);
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}
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/* Program OTAP */
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if (otap_delay)
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zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK,
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(otap_delay << 16));
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zynqmp_mmio_write(SD_DLL_CTRL, SD1_DLL_RST_MASK, 0x0);
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}
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}
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