mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-20 17:08:52 +09:00
![Sergei Poselenov](/assets/img/avatar_default.png)
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
212 lines
5.1 KiB
C
212 lines
5.1 KiB
C
/*
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* (C) Copyright 2008
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* Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
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*
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* Copyright 2004 Freescale Semiconductor.
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* (C) Copyright 2002,2003, Motorola Inc.
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* Xianghua Xiao, (X.Xiao@motorola.com)
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*
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* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <pci.h>
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#include <asm/processor.h>
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#include <asm/immap_85xx.h>
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#include <ioports.h>
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#include <flash.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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DECLARE_GLOBAL_DATA_PTR;
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extern flash_info_t flash_info[]; /* FLASH chips info */
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void local_bus_init (void);
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ulong flash_get_size (ulong base, int banknum);
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int checkboard (void)
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{
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char *s = getenv("serial#");
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puts("Board: Socrates");
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if (s != NULL) {
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puts(", serial# ");
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puts(s);
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}
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putc('\n');
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#ifdef CONFIG_PCI
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printf ("PCI1: 32 bit, %d MHz (compiled)\n",
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CONFIG_SYS_CLK_FREQ / 1000000);
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#else
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printf ("PCI1: disabled\n");
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#endif
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/*
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* Initialize local bus.
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*/
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local_bus_init ();
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return 0;
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}
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int misc_init_r (void)
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{
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volatile ccsr_lbc_t *memctl = (void *)(CFG_MPC85xx_LBC_ADDR);
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/*
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* Adjust flash start and offset to detected values
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*/
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gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
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gd->bd->bi_flashoffset = 0;
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/*
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* Check if boot FLASH isn't max size
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*/
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if (gd->bd->bi_flashsize < (0 - CFG_FLASH0)) {
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memctl->or0 = gd->bd->bi_flashstart | (CFG_OR0_PRELIM & 0x00007fff);
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memctl->br0 = gd->bd->bi_flashstart | (CFG_BR0_PRELIM & 0x00007fff);
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/*
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* Re-check to get correct base address
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*/
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flash_get_size(gd->bd->bi_flashstart, CFG_MAX_FLASH_BANKS - 1);
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}
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/*
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* Check if only one FLASH bank is available
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*/
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if (gd->bd->bi_flashsize != CFG_MAX_FLASH_BANKS * (0 - CFG_FLASH0)) {
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memctl->or1 = 0;
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memctl->br1 = 0;
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/*
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* Re-do flash protection upon new addresses
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*/
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flash_protect (FLAG_PROTECT_CLEAR,
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gd->bd->bi_flashstart, 0xffffffff,
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&flash_info[CFG_MAX_FLASH_BANKS - 1]);
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/* Monitor protection ON by default */
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flash_protect (FLAG_PROTECT_SET,
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CFG_MONITOR_BASE, CFG_MONITOR_BASE + monitor_flash_len - 1,
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&flash_info[CFG_MAX_FLASH_BANKS - 1]);
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/* Environment protection ON by default */
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flash_protect (FLAG_PROTECT_SET,
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CFG_ENV_ADDR,
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CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
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&flash_info[CFG_MAX_FLASH_BANKS - 1]);
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/* Redundant environment protection ON by default */
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flash_protect (FLAG_PROTECT_SET,
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CFG_ENV_ADDR_REDUND,
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CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
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&flash_info[CFG_MAX_FLASH_BANKS - 1]);
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}
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return 0;
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}
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/*
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* Initialize Local Bus
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*/
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void local_bus_init (void)
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{
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volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
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volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
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lbc->ltesr = 0xffffffff; /* Clear LBC error interrupts */
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lbc->lteir = 0xffffffff; /* Enable LBC error interrupts */
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ecm->eedr = 0xffffffff; /* Clear ecm errors */
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ecm->eeer = 0xffffffff; /* Enable ecm errors */
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}
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#if defined(CONFIG_PCI)
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/*
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* Initialize PCI Devices, report devices found.
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*/
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#ifndef CONFIG_PCI_PNP
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static struct pci_config_table pci_mpc85xxads_config_table[] = {
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{PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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PCI_IDSEL_NUMBER, PCI_ANY_ID,
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pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
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PCI_ENET0_MEMADDR,
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PCI_COMMAND_MEMORY |
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PCI_COMMAND_MASTER}},
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{}
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};
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#endif
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static struct pci_controller hose = {
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#ifndef CONFIG_PCI_PNP
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config_table:pci_mpc85xxads_config_table,
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#endif
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};
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#endif /* CONFIG_PCI */
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void pci_init_board (void)
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{
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#ifdef CONFIG_PCI
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pci_mpc85xx_init (&hose);
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#endif /* CONFIG_PCI */
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}
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#ifdef CONFIG_BOARD_EARLY_INIT_R
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int board_early_init_r (void)
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{
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#ifdef CONFIG_PS2MULT
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ps2mult_early_init();
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#endif /* CONFIG_PS2MULT */
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return (0);
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}
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#endif /* CONFIG_BOARD_EARLY_INIT_R */
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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void
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ft_board_setup(void *blob, bd_t *bd)
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{
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u32 val[4];
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int rc;
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ft_cpu_setup(blob, bd);
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/* Fixup NOR mapping */
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val[0] = 0; /* chip select number */
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val[1] = 0; /* always 0 */
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val[2] = gd->bd->bi_flashstart;
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val[3] = gd->bd->bi_flashsize;
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rc = fdt_find_and_setprop(blob, "/localbus", "ranges",
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val, sizeof(val), 1);
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if (rc)
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printf("Unable to update property NOR mapping, err=%s\n",
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fdt_strerror(rc));
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}
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#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
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