mirror of
https://github.com/brain-hackers/u-boot-brain
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60083261a1
The gdsys ControlCenter Digital board is based on a Marvell Armada 38x SOC. It boots from SPI-Flash but can be configured to boot from SD-card for factory programming and testing. On board peripherals include: - 2 x GbE - Xilinx Kintex-7 FPGA connected via PCIe - mSATA - USB3 host - Atmel TPM Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
39 lines
761 B
C
39 lines
761 B
C
/*
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* (C) Copyright 2013
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* Reinhard Pfau, Guntermann & Drunck GmbH, reinhard.pfau@gdsys.cc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __HRE_H
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#define __HRE_H
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struct key_program {
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uint32_t magic;
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uint32_t code_crc;
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uint32_t code_size;
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uint8_t code[];
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};
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struct h_reg {
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bool valid;
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uint8_t digest[20];
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};
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/* CCDM specific contants */
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enum {
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/* NV indices */
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NV_COMMON_DATA_INDEX = 0x40000001,
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/* magics for key blob chains */
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MAGIC_KEY_PROGRAM = 0x68726500,
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MAGIC_HMAC = 0x68616300,
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MAGIC_END_OF_CHAIN = 0x00000000,
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/* sizes */
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NV_COMMON_DATA_MIN_SIZE = 3 * sizeof(uint64_t) + 2 * sizeof(uint16_t),
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};
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int hre_verify_program(struct key_program *prg);
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int hre_run_program(const uint8_t *code, size_t code_size);
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#endif /* __HRE_H */
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