mirror of
https://github.com/brain-hackers/u-boot-brain
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227 lines
5.8 KiB
C
227 lines
5.8 KiB
C
/*
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* Micrel PHY drivers
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Copyright 2010-2011 Freescale Semiconductor, Inc.
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* author Andy Fleming
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* (C) 2012 NetModule AG, David Andrey, added KSZ9031
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*/
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#include <config.h>
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#include <common.h>
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#include <micrel.h>
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#include <phy.h>
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static struct phy_driver KSZ804_driver = {
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.name = "Micrel KSZ804",
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.uid = 0x221510,
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.mask = 0xfffff0,
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.features = PHY_BASIC_FEATURES,
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.config = &genphy_config,
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.startup = &genphy_startup,
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.shutdown = &genphy_shutdown,
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};
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#ifndef CONFIG_PHY_MICREL_KSZ9021
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/*
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* I can't believe Micrel used the exact same part number
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* for the KSZ9021
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* Shame Micrel, Shame!!!!!
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*/
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static struct phy_driver KS8721_driver = {
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.name = "Micrel KS8721BL",
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.uid = 0x221610,
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.mask = 0xfffff0,
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.features = PHY_BASIC_FEATURES,
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.config = &genphy_config,
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.startup = &genphy_startup,
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.shutdown = &genphy_shutdown,
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};
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#endif
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/**
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* KSZ9021 - KSZ9031 common
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*/
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#define MII_KSZ90xx_PHY_CTL 0x1f
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#define MIIM_KSZ90xx_PHYCTL_1000 (1 << 6)
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#define MIIM_KSZ90xx_PHYCTL_100 (1 << 5)
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#define MIIM_KSZ90xx_PHYCTL_10 (1 << 4)
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#define MIIM_KSZ90xx_PHYCTL_DUPLEX (1 << 3)
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static int ksz90xx_startup(struct phy_device *phydev)
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{
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unsigned phy_ctl;
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genphy_update_link(phydev);
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phy_ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ90xx_PHY_CTL);
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if (phy_ctl & MIIM_KSZ90xx_PHYCTL_DUPLEX)
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phydev->duplex = DUPLEX_FULL;
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else
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phydev->duplex = DUPLEX_HALF;
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if (phy_ctl & MIIM_KSZ90xx_PHYCTL_1000)
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phydev->speed = SPEED_1000;
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else if (phy_ctl & MIIM_KSZ90xx_PHYCTL_100)
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phydev->speed = SPEED_100;
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else if (phy_ctl & MIIM_KSZ90xx_PHYCTL_10)
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phydev->speed = SPEED_10;
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return 0;
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}
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#ifdef CONFIG_PHY_MICREL_KSZ9021
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/*
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* KSZ9021
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*/
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/* PHY Registers */
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#define MII_KSZ9021_EXTENDED_CTRL 0x0b
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#define MII_KSZ9021_EXTENDED_DATAW 0x0c
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#define MII_KSZ9021_EXTENDED_DATAR 0x0d
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#define CTRL1000_PREFER_MASTER (1 << 10)
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#define CTRL1000_CONFIG_MASTER (1 << 11)
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#define CTRL1000_MANUAL_CONFIG (1 << 12)
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int ksz9021_phy_extended_write(struct phy_device *phydev, int regnum, u16 val)
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{
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/* extended registers */
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phy_write(phydev, MDIO_DEVAD_NONE,
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MII_KSZ9021_EXTENDED_CTRL, regnum | 0x8000);
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return phy_write(phydev, MDIO_DEVAD_NONE,
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MII_KSZ9021_EXTENDED_DATAW, val);
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}
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int ksz9021_phy_extended_read(struct phy_device *phydev, int regnum)
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{
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/* extended registers */
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phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZ9021_EXTENDED_CTRL, regnum);
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return phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ9021_EXTENDED_DATAR);
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}
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static int ksz9021_phy_extread(struct phy_device *phydev, int addr, int devaddr,
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int regnum)
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{
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return ksz9021_phy_extended_read(phydev, regnum);
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}
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static int ksz9021_phy_extwrite(struct phy_device *phydev, int addr,
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int devaddr, int regnum, u16 val)
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{
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return ksz9021_phy_extended_write(phydev, regnum, val);
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}
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/* Micrel ksz9021 */
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static int ksz9021_config(struct phy_device *phydev)
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{
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unsigned ctrl1000 = 0;
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const unsigned master = CTRL1000_PREFER_MASTER |
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CTRL1000_CONFIG_MASTER | CTRL1000_MANUAL_CONFIG;
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unsigned features = phydev->drv->features;
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if (getenv("disable_giga"))
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features &= ~(SUPPORTED_1000baseT_Half |
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SUPPORTED_1000baseT_Full);
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/* force master mode for 1000BaseT due to chip errata */
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if (features & SUPPORTED_1000baseT_Half)
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ctrl1000 |= ADVERTISE_1000HALF | master;
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if (features & SUPPORTED_1000baseT_Full)
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ctrl1000 |= ADVERTISE_1000FULL | master;
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phydev->advertising = phydev->supported = features;
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phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, ctrl1000);
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genphy_config_aneg(phydev);
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genphy_restart_aneg(phydev);
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return 0;
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}
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static struct phy_driver ksz9021_driver = {
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.name = "Micrel ksz9021",
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.uid = 0x221610,
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.mask = 0xfffff0,
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.features = PHY_GBIT_FEATURES,
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.config = &ksz9021_config,
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.startup = &ksz90xx_startup,
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.shutdown = &genphy_shutdown,
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.writeext = &ksz9021_phy_extwrite,
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.readext = &ksz9021_phy_extread,
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};
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#endif
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/**
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* KSZ9031
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*/
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/* PHY Registers */
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#define MII_KSZ9031_MMD_ACCES_CTRL 0x0d
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#define MII_KSZ9031_MMD_REG_DATA 0x0e
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/* Accessors to extended registers*/
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int ksz9031_phy_extended_write(struct phy_device *phydev,
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int devaddr, int regnum, u16 mode, u16 val)
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{
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/*select register addr for mmd*/
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phy_write(phydev, MDIO_DEVAD_NONE,
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MII_KSZ9031_MMD_ACCES_CTRL, devaddr);
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/*select register for mmd*/
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phy_write(phydev, MDIO_DEVAD_NONE,
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MII_KSZ9031_MMD_REG_DATA, regnum);
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/*setup mode*/
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phy_write(phydev, MDIO_DEVAD_NONE,
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MII_KSZ9031_MMD_ACCES_CTRL, (mode | devaddr));
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/*write the value*/
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return phy_write(phydev, MDIO_DEVAD_NONE,
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MII_KSZ9031_MMD_REG_DATA, val);
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}
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int ksz9031_phy_extended_read(struct phy_device *phydev, int devaddr,
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int regnum, u16 mode)
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{
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phy_write(phydev, MDIO_DEVAD_NONE,
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MII_KSZ9031_MMD_ACCES_CTRL, devaddr);
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phy_write(phydev, MDIO_DEVAD_NONE,
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MII_KSZ9031_MMD_REG_DATA, regnum);
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phy_write(phydev, MDIO_DEVAD_NONE,
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MII_KSZ9031_MMD_ACCES_CTRL, (devaddr | mode));
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return phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ9031_MMD_REG_DATA);
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}
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static int ksz9031_phy_extread(struct phy_device *phydev, int addr, int devaddr,
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int regnum)
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{
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return ksz9031_phy_extended_read(phydev, devaddr, regnum,
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MII_KSZ9031_MOD_DATA_NO_POST_INC);
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};
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static int ksz9031_phy_extwrite(struct phy_device *phydev, int addr,
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int devaddr, int regnum, u16 val)
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{
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return ksz9031_phy_extended_write(phydev, devaddr, regnum,
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MII_KSZ9031_MOD_DATA_POST_INC_RW, val);
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};
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static struct phy_driver ksz9031_driver = {
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.name = "Micrel ksz9031",
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.uid = 0x221620,
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.mask = 0xfffff0,
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.features = PHY_GBIT_FEATURES,
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.config = &genphy_config,
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.startup = &ksz90xx_startup,
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.shutdown = &genphy_shutdown,
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.writeext = &ksz9031_phy_extwrite,
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.readext = &ksz9031_phy_extread,
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};
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int phy_micrel_init(void)
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{
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phy_register(&KSZ804_driver);
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#ifdef CONFIG_PHY_MICREL_KSZ9021
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phy_register(&ksz9021_driver);
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#else
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phy_register(&KS8721_driver);
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#endif
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phy_register(&ksz9031_driver);
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return 0;
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}
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