mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-22 18:09:03 +09:00
548 lines
17 KiB
C
548 lines
17 KiB
C
/*
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* (C) Copyright 2002 ELTEC Elektronik AG
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* Frank Gottschling <fgottschling@eltec.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/* includes */
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#include <common.h>
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#include <linux/ctype.h>
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#include <pci.h>
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#include <net.h>
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#include <mpc106.h>
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#include <w83c553f.h>
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#include "srom.h"
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/* imports */
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extern char console_buffer[CFG_CBSIZE];
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extern int l2_cache_enable (int l2control);
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extern void *nvram_read (void *dest, const short src, size_t count);
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extern void nvram_write (short dest, const void *src, size_t count);
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/* globals */
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unsigned int ata_reset_time = 60;
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unsigned int scsi_reset_time = 10;
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unsigned int eltec_board;
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/* BAB750 uses SYM53C875(default) and BAB740 uses SYM53C860
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* values fixed after board identification
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*/
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unsigned short scsi_dev_id = PCI_DEVICE_ID_NCR_53C875;
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unsigned int scsi_max_scsi_id = 15;
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unsigned char scsi_sym53c8xx_ccf = 0x13;
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/*----------------------------------------------------------------------------*/
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/*
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* handle sroms on BAB740/750
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* fix ether address
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* L2 cache initialization
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* ide dma control
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*/
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int misc_init_r (void)
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{
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revinfo eerev;
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char *ptr;
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u_int i, l, initSrom, copyNv;
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char buf[256];
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char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0,
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0, 0, 0, 0, 10, 11, 12, 13, 14, 15 };
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pci_dev_t bdf;
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char sromSYM[] = {
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#ifdef TULIP_BUG
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/* 10BaseT, 100BaseTx no full duplex modes */
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
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0x02, 0x86, 0x02, 0x00, 0xaf, 0x08, 0xa5, 0x00,
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0x88, 0x04, 0x03, 0x27, 0x08, 0x25, 0x00, 0x61,
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0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc6, 0xe8
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#endif
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/* 10BaseT, 10BaseT-FD, 100BaseTx, 100BaseTx-FD */
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
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0x04, 0x86, 0x02, 0x00, 0xaf, 0x08, 0xa5, 0x00,
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0x86, 0x02, 0x04, 0xaf, 0x08, 0xa5, 0x00, 0x88,
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0x04, 0x03, 0x27, 0x08, 0x25, 0x00, 0x61, 0x80,
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0x88, 0x04, 0x05, 0x27, 0x08, 0x25, 0x00, 0x61,
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0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x77
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};
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char sromMII[] = {
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x5b, 0x00,
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0x2e, 0x4d, 0x00, 0x1e, 0x00, 0x00, 0x00, 0x08,
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0x01, 0x95, 0x03, 0x00, 0x00, 0x04, 0x01, 0x08,
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0x00, 0x00, 0x02, 0x08, 0x02, 0x00, 0x00, 0x78,
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0xe0, 0x01, 0x00, 0x50, 0x00, 0x18, 0x80, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xde, 0x41
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};
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/*
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* Check/Remake revision info
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*/
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initSrom = 0;
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copyNv = 0;
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/* read out current revision srom contens */
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el_srom_load (0x0000, (u_char*)&eerev, sizeof(revinfo),
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SECOND_DEVICE, FIRST_BLOCK);
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/* read out current nvram shadow image */
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nvram_read (buf, CFG_NV_SROM_COPY_ADDR, CFG_SROM_SIZE);
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if (strcmp (eerev.magic, "ELTEC") != 0)
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{
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/* srom is not initialized -> create a default revision info */
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for (i = 0, ptr = (char *)&eerev; i < sizeof(revinfo); i++)
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*ptr++ = 0x00;
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strcpy(eerev.magic, "ELTEC");
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eerev.revrev[0] = 1;
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eerev.revrev[1] = 0;
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eerev.size = 0x00E0;
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eerev.category[0] = 0x01;
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/* node id from dead e128 as default */
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eerev.etheraddr[0] = 0x00;
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eerev.etheraddr[1] = 0x00;
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eerev.etheraddr[2] = 0x5B;
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eerev.etheraddr[3] = 0x00;
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eerev.etheraddr[4] = 0x2E;
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eerev.etheraddr[5] = 0x4D;
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/* cache config word for bab750 */
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*(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH;
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initSrom = 1; /* force dialog */
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copyNv = 1; /* copy to nvram */
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}
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if ((copyNv == 0) && (el_srom_checksum((u_char*)&eerev, CFG_SROM_SIZE) !=
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el_srom_checksum((u_char*)buf, CFG_SROM_SIZE)))
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{
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printf ("Invalid revision info copy in nvram !\n");
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printf ("Press key:\n <c> to copy current revision info to nvram.\n");
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printf (" <r> to reenter revision info.\n");
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printf ("=> ");
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if (0 != readline (NULL))
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{
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switch ((char)toupper(console_buffer[0]))
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{
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case 'C':
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copyNv = 1;
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break;
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case 'R':
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copyNv = 1;
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initSrom = 1;
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break;
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}
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}
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}
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if (initSrom)
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{
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memcpy (buf, &eerev.revision[0][0], 14); /* save all revision info */
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printf ("Enter revision number (0-9): %c ", eerev.revision[0][0]);
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if (0 != readline (NULL))
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{
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eerev.revision[0][0] = (char)toupper(console_buffer[0]);
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memcpy (&eerev.revision[1][0], buf, 12); /* shift rest of rev info */
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}
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printf ("Enter revision character (A-Z): %c ", eerev.revision[0][1]);
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if (1 == readline (NULL))
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{
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eerev.revision[0][1] = (char)toupper(console_buffer[0]);
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}
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printf ("Enter board name (V-XXXX-XXXX): %s ", (char *)&eerev.board);
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if (11 == readline (NULL))
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{
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for (i=0; i<11; i++)
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eerev.board[i] = (char)toupper(console_buffer[i]);
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eerev.board[11] = '\0';
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}
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printf ("Enter serial number: %s ", (char *)&eerev.serial );
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if (6 == readline (NULL))
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{
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for (i=0; i<6; i++)
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eerev.serial[i] = console_buffer[i];
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eerev.serial[6] = '\0';
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}
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printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ",
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eerev.etheraddr[0], eerev.etheraddr[1],
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eerev.etheraddr[2], eerev.etheraddr[3],
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eerev.etheraddr[4], eerev.etheraddr[5]);
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if (12 == readline (NULL))
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{
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for (i=0; i<12; i+=2)
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eerev.etheraddr[i>>1] = (char)(16*hex[toupper(console_buffer[i])-'0'] +
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hex[toupper(console_buffer[i+1])-'0']);
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}
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l = strlen ((char *)&eerev.text);
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printf("Add to text section (max 64 chr): %s ", (char *)&eerev.text );
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if (0 != readline (NULL))
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{
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for (i = l; i<63; i++)
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eerev.text[i] = console_buffer[i-l];
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eerev.text[63] = '\0';
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}
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if (strstr ((char *)&eerev.board, "75") != NULL)
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eltec_board = 750;
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else
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eltec_board = 740;
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if (eltec_board == 750)
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{
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if (CPU_TYPE == CPU_TYPE_750)
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*(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH;
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else
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*(int*)&eerev.res[0] = CLK2P5TO1_1MB_PB_0P5DH;
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printf("Enter L2Cache config word with leading zero (HEX): %08X ",
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*(int*)&eerev.res[0] );
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if (0 != readline (NULL))
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{
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for (i=0; i<7; i+=2)
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{
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eerev.res[i>>1] =
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(char)(16*hex[toupper(console_buffer[i])-'0'] +
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hex[toupper(console_buffer[i+1])-'0']);
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}
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}
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/* prepare network eeprom */
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sromMII[20] = eerev.etheraddr[0];
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sromMII[21] = eerev.etheraddr[1];
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sromMII[22] = eerev.etheraddr[2];
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sromMII[23] = eerev.etheraddr[3];
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sromMII[24] = eerev.etheraddr[4];
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sromMII[25] = eerev.etheraddr[5];
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printf("\nSRom: Writing DEC21143 MII info .. ");
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if (dc_srom_store ((u_short *)sromMII) == -1)
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printf("FAILED\n");
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else
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printf("OK\n");
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}
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if (eltec_board == 740)
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{
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*(int *)&eerev.res[0] = 0;
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sromSYM[20] = eerev.etheraddr[0];
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sromSYM[21] = eerev.etheraddr[1];
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sromSYM[22] = eerev.etheraddr[2];
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sromSYM[23] = eerev.etheraddr[3];
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sromSYM[24] = eerev.etheraddr[4];
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sromSYM[25] = eerev.etheraddr[5];
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printf("\nSRom: Writing DEC21143 SYM info .. ");
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if (dc_srom_store ((u_short *)sromSYM) == -1)
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printf("FAILED\n");
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else
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printf("OK\n");
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}
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/* update CRC */
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eerev.crc = el_srom_checksum((u_char *)eerev.board, eerev.size);
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/* write new values */
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printf("\nSRom: Writing revision info ...... ");
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if (el_srom_store((BLOCK_SIZE-sizeof(revinfo)), (u_char *)&eerev,
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sizeof(revinfo), SECOND_DEVICE, FIRST_BLOCK) == -1)
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printf("FAILED\n\n");
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else
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printf("OK\n\n");
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/* write new values as shadow image to nvram */
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nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE);
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} /*if (initSrom) */
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/* copy current values as shadow image to nvram */
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if (initSrom == 0 && copyNv == 1)
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nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE);
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/* update environment */
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sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x",
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eerev.etheraddr[0], eerev.etheraddr[1],
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eerev.etheraddr[2], eerev.etheraddr[3],
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eerev.etheraddr[4], eerev.etheraddr[5]);
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setenv ("ethaddr", buf);
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/* print actual board identification */
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printf("Ident: %s Ser %s Rev %c%c\n",
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eerev.board, (char *)&eerev.serial,
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eerev.revision[0][0], eerev.revision[0][1]);
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/* global board ident */
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if (strstr ((char *)&eerev.board, "75") != NULL)
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eltec_board = 750;
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else
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eltec_board = 740;
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/*
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* L2 cache configuration
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*/
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#if defined(CFG_L2_BAB7xx)
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ptr = getenv("l2cache");
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if (*ptr == '0')
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{
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printf ("Cache: L2 NOT activated on BAB%d\n", eltec_board);
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}
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else
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{
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printf ("Cache: L2 activated on BAB%d\n", eltec_board);
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l2_cache_enable(*(int*)&eerev.res[0]);
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}
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#endif
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/*
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* Reconfig ata reset timeout from environment
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*/
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if ((ptr = getenv ("ata_reset_time")) != NULL)
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{
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ata_reset_time = (int)simple_strtoul (ptr, NULL, 10);
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}
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else
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{
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sprintf (buf, "%d", ata_reset_time);
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setenv ("ata_reset_time", buf);
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}
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/*
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* Reconfig scsi reset timeout from environment
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*/
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if ((ptr = getenv ("scsi_reset_time")) != NULL)
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{
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scsi_reset_time = (int)simple_strtoul (ptr, NULL, 10);
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}
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else
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{
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sprintf (buf, "%d", scsi_reset_time);
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setenv ("scsi_reset_time", buf);
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}
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if ((bdf = pci_find_device(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, 0)) > 0)
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{
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if (pci_find_device(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C860, 0) > 0)
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{
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/* BAB740 with SCSI=IRQ 11; SCC=IRQ 9; no IDE; NCR860 at 80 Mhz */
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scsi_dev_id = PCI_DEVICE_ID_NCR_53C860;
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scsi_max_scsi_id = 7;
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scsi_sym53c8xx_ccf = 0x15;
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pci_write_config_byte (bdf, WINBOND_IDEIRCR, 0xb0);
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}
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if ((ptr = getenv ("ide_dma_off")) != NULL)
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{
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u_long dma_off = simple_strtoul (ptr, NULL, 10);
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/*
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* setup user defined registers
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* s.a. linux/drivers/ide/sl82c105.c
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*/
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bdf |= PCI_BDF(0,0,1); /* ide user reg at bdf function 1 */
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if (dma_off & 1)
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{
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pci_write_config_byte (bdf, 0x46, 1);
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printf("IDE: DMA off flag set: Bus 0 : Dev 0\n");
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}
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if (dma_off & 2)
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{
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pci_write_config_byte (bdf, 0x4a, 1);
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printf("IDE: DMA off flag set: Bus 0 : Dev 1\n");
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}
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if (dma_off & 4)
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{
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pci_write_config_byte (bdf, 0x4e, 1);
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printf("IDE: DMA off flag set: Bus 1 : Dev 0\n");
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}
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if (dma_off & 8)
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{
|
|
pci_write_config_byte (bdf, 0x52, 1);
|
|
printf("IDE: DMA off flag set: Bus 1 : Dev 1\n");
|
|
}
|
|
}
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
/*
|
|
* BAB740 uses KENDIN KS8761 modem chip with not common setup values
|
|
*/
|
|
#ifdef CONFIG_TULIP_SELECT_MEDIA
|
|
|
|
/* Register bits.
|
|
*/
|
|
#define BMR_SWR 0x00000001 /* Software Reset */
|
|
#define STS_TS 0x00700000 /* Transmit Process State */
|
|
#define STS_RS 0x000e0000 /* Receive Process State */
|
|
#define OMR_ST 0x00002000 /* Start/Stop Transmission Command */
|
|
#define OMR_SR 0x00000002 /* Start/Stop Receive */
|
|
#define OMR_PS 0x00040000 /* Port Select */
|
|
#define OMR_SDP 0x02000000 /* SD Polarity - MUST BE ASSERTED */
|
|
#define OMR_PM 0x00000080 /* Pass All Multicast */
|
|
#define OMR_PR 0x00000040 /* Promiscuous Mode */
|
|
#define OMR_PCS 0x00800000 /* PCS Function */
|
|
#define OMR_TTM 0x00400000 /* Transmit Threshold Mode */
|
|
|
|
/* Ethernet chip registers.
|
|
*/
|
|
#define DE4X5_BMR 0x000 /* Bus Mode Register */
|
|
#define DE4X5_TPD 0x008 /* Transmit Poll Demand Reg */
|
|
#define DE4X5_RRBA 0x018 /* RX Ring Base Address Reg */
|
|
#define DE4X5_TRBA 0x020 /* TX Ring Base Address Reg */
|
|
#define DE4X5_STS 0x028 /* Status Register */
|
|
#define DE4X5_OMR 0x030 /* Operation Mode Register */
|
|
#define DE4X5_SISR 0x060 /* SIA Status Register */
|
|
#define DE4X5_SICR 0x068 /* SIA Connectivity Register */
|
|
#define DE4X5_TXRX 0x070 /* SIA Transmit and Receive Register */
|
|
#define DE4X5_GPPR 0x078 /* General Purpose Port register */
|
|
#define DE4X5_APROM 0x048 /* Ethernet Address PROM */
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
static int INL(struct eth_device* dev, u_long addr)
|
|
{
|
|
return le32_to_cpu(*(volatile u_long *)(addr + dev->iobase));
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
static void OUTL(struct eth_device* dev, int command, u_long addr)
|
|
{
|
|
*(volatile u_long *)(addr + dev->iobase) = cpu_to_le32(command);
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
static void media_reg_init (
|
|
struct eth_device* dev,
|
|
u32 csr14,
|
|
u32 csr15_dir,
|
|
u32 csr15_v0,
|
|
u32 csr15_v1,
|
|
u32 csr6 )
|
|
{
|
|
OUTL(dev, 0, DE4X5_OMR); /* CSR6 */
|
|
udelay(10 * 1000);
|
|
OUTL(dev, 0, DE4X5_SICR); /* CSR13 */
|
|
OUTL(dev, 1, DE4X5_SICR); /* CSR13 */
|
|
udelay(10 * 1000);
|
|
OUTL(dev, csr14, DE4X5_TXRX); /* CSR14 */
|
|
OUTL(dev, csr15_dir, DE4X5_GPPR); /* CSR15 */
|
|
OUTL(dev, csr15_v0, DE4X5_GPPR); /* CSR15 */
|
|
udelay(10 * 1000);
|
|
OUTL(dev, csr15_v1, DE4X5_GPPR); /* CSR15 */
|
|
OUTL(dev, 0x00000301, DE4X5_SISR); /* CSR12 */
|
|
OUTL(dev, csr6, DE4X5_OMR); /* CSR6 */
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------*/
|
|
|
|
void dc21x4x_select_media(struct eth_device* dev)
|
|
{
|
|
int i, status, ext;
|
|
extern unsigned int eltec_board;
|
|
|
|
if (eltec_board == 740)
|
|
{
|
|
printf("SYM media select "); /* BAB740 */
|
|
/* start autoneg. with 10 mbit */
|
|
media_reg_init (dev, 0x3ffff, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400080);
|
|
ext = status = 0;
|
|
for (i=0; i<2000+ext; i++)
|
|
{
|
|
status = INL(dev, DE4X5_SISR);
|
|
udelay(1000);
|
|
if (status & 0x2000) ext = 2000;
|
|
if ((status & 0x7000) == 0x5000) break;
|
|
}
|
|
|
|
/* autoneg. ok -> 100MB FD */
|
|
if ((status & 0x0100f000) == 0x0100d000)
|
|
{
|
|
media_reg_init (dev, 0x37f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40280);
|
|
printf("100baseTx-FD\n");
|
|
}
|
|
/* autoneg. ok -> 100MB HD */
|
|
else if ((status & 0x0080f000) == 0x0080d000)
|
|
{
|
|
media_reg_init (dev, 0x17f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40080);
|
|
printf("100baseTx\n");
|
|
}
|
|
/* autoneg. ok -> 10MB FD */
|
|
else if ((status & 0x0040f000) == 0x0040d000)
|
|
{
|
|
media_reg_init (dev, 0x07f7f, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400280);
|
|
printf("10baseT-FD\n");
|
|
}
|
|
/* autoneg. fail -> 10MB HD */
|
|
else
|
|
{
|
|
media_reg_init (dev, 0x7f7f, 0x08af0008, 0x00a10008, 0x00a50008,
|
|
(OMR_SDP | OMR_TTM | OMR_PM));
|
|
printf("10baseT\n");
|
|
}
|
|
}
|
|
else
|
|
{
|
|
printf("MII media selected\n"); /* BAB750 */
|
|
OUTL(dev, OMR_SDP | OMR_PS | OMR_PM, DE4X5_OMR); /* CSR6 */
|
|
}
|
|
}
|
|
#endif /* CONFIG_TULIP_SELECT_MEDIA */
|
|
|
|
/*---------------------------------------------------------------------------*/
|