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https://github.com/brain-hackers/u-boot-brain
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47ed5dd031
Current LDS files /DISCARD/ a lot of sections when linking ELF files, causing diagnostic tools such as readelf or objdump to produce partial output. Keep all section at link stage, filter only at objcopy time so that .bin remains minimal. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
75 lines
1.3 KiB
Plaintext
75 lines
1.3 KiB
Plaintext
/*
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* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
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* on behalf of DENX Software Engineering GmbH
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*
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* January 2004 - Changed to support H4 device
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* Copyright (c) 2004-2008 Texas Instruments
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(_start)
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SECTIONS
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{
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. = CONFIG_SPL_TEXT_BASE;
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.text.0 :
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{
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arch/arm/cpu/pxa/start.o (.text*)
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board/vpac270/libvpac270.o (.text*)
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drivers/mtd/onenand/libonenand.o (.text*)
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}
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/* Start of the rest of the SPL */
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. = CONFIG_SPL_TEXT_BASE + 0x800;
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.text.1 :
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{
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*(.text*)
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}
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. = ALIGN(4);
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.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
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. = ALIGN(4);
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.data : {
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*(.data*)
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}
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. = ALIGN(4);
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__image_copy_end = .;
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.rel.dyn : {
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__rel_dyn_start = .;
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*(.rel*)
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__rel_dyn_end = .;
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}
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. = ALIGN(0x800);
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_end = .;
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.bss __rel_dyn_start (OVERLAY) : {
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__bss_start = .;
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*(.bss*)
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. = ALIGN(4);
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__bss_end = .;
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}
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.dynsym _end : { *(.dynsym) }
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.dynbss : { *(.dynbss) }
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.dynstr : { *(.dynstr*) }
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.dynamic : { *(.dynamic*) }
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.hash : { *(.hash*) }
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.plt : { *(.plt*) }
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.interp : { *(.interp*) }
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.gnu : { *(.gnu*) }
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.ARM.exidx : { *(.ARM.exidx*) }
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}
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