Duncan Laurie b83058cd23 x86: Issue SMI to finalize Coreboot in final stage ... This will write magic value to APMC command port which will trigger an SMI and cause coreboot to lock down the ME, chipset, and CPU. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>		2012-12-06 14:30:43 -08:00
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coreboot	x86: Issue SMI to finalize Coreboot in final stage	2012-12-06 14:30:43 -08:00
sc520	sc520: fix build warning about unused temp var	2012-03-06 21:05:18 +11:00
config.mk	Convert ISO-8859 files to UTF-8	2011-08-04 23:34:02 +02:00
cpu.c	x86: Add basic cache operations	2012-12-06 14:30:39 -08:00
interrupts.c	x86: Add basic cache operations	2012-12-06 14:30:39 -08:00
Makefile	x86: Add a dummy implementation for timer_get_us	2012-11-30 13:44:05 -08:00
resetvec.S	Convert ISO-8859 files to UTF-8	2011-08-04 23:34:02 +02:00
start16.S	x86: Add back cold- and warm-boot flags	2012-12-06 14:30:42 -08:00
start.S	x86: Add back cold- and warm-boot flags	2012-12-06 14:30:42 -08:00
timer.c	x86: Add a dummy implementation for timer_get_us	2012-11-30 13:44:05 -08:00
u-boot.lds	x86: Allow excluding reset vector code from u-boot	2012-11-28 11:40:03 -08:00