mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-20 08:58:52 +09:00
85 lines
1.9 KiB
C
85 lines
1.9 KiB
C
/*
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* Copyright (C) 2014 Gateworks Corporation
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* Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
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*
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* Author: Tim Harvey <tharvey@gateworks.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/spl.h>
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#include <spl.h>
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#if defined(CONFIG_MX6)
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/* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */
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u32 spl_boot_device(void)
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{
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struct src *psrc = (struct src *)SRC_BASE_ADDR;
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unsigned int gpr10_boot = readl(&psrc->gpr10) & (1 << 28);
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unsigned reg = gpr10_boot ? readl(&psrc->gpr9) : readl(&psrc->sbmr1);
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/* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
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switch ((reg & 0x000000FF) >> 4) {
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/* EIM: See 8.5.1, Table 8-9 */
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case 0x0:
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/* BOOT_CFG1[3]: NOR/OneNAND Selection */
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if ((reg & 0x00000008) >> 3)
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return BOOT_DEVICE_ONENAND;
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else
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return BOOT_DEVICE_NOR;
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break;
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/* SATA: See 8.5.4, Table 8-20 */
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case 0x2:
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return BOOT_DEVICE_SATA;
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/* Serial ROM: See 8.5.5.1, Table 8-22 */
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case 0x3:
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/* BOOT_CFG4[2:0] */
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switch ((reg & 0x07000000) >> 24) {
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case 0x0 ... 0x4:
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return BOOT_DEVICE_SPI;
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case 0x5 ... 0x7:
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return BOOT_DEVICE_I2C;
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}
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break;
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/* SD/eSD: 8.5.3, Table 8-15 */
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case 0x4:
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case 0x5:
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return BOOT_DEVICE_MMC1;
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/* MMC/eMMC: 8.5.3 */
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case 0x6:
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case 0x7:
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return BOOT_DEVICE_MMC1;
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/* NAND Flash: 8.5.2 */
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case 0x8 ... 0xf:
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return BOOT_DEVICE_NAND;
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}
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return BOOT_DEVICE_NONE;
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}
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#endif
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#if defined(CONFIG_SPL_MMC_SUPPORT)
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/* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */
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u32 spl_boot_mode(void)
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{
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switch (spl_boot_device()) {
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/* for MMC return either RAW or FAT mode */
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case BOOT_DEVICE_MMC1:
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case BOOT_DEVICE_MMC2:
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#if defined(CONFIG_SPL_FAT_SUPPORT)
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return MMCSD_MODE_FS;
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#elif defined(CONFIG_SUPPORT_EMMC_BOOT)
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return MMCSD_MODE_EMMCBOOT;
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#else
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return MMCSD_MODE_RAW;
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#endif
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break;
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default:
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puts("spl: ERROR: unsupported device\n");
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hang();
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}
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}
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#endif
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