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https://github.com/brain-hackers/u-boot-brain
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b77c3547e8
T114, like T30, does not have a separate/different DVC (power I2C) controller like T20 - all 5 I2C controllers are identical, but I2C5 is used to designate the controller intended for power control (PWR_I2C in the schematics). PWR_I2C is set to 400KHz. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
39 lines
544 B
Plaintext
39 lines
544 B
Plaintext
/dts-v1/;
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/include/ ARCH_CPU_DTS
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/ {
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model = "NVIDIA Dalmore";
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compatible = "nvidia,dalmore", "nvidia,tegra114";
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memory {
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device_type = "memory";
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reg = <0x80000000 0x80000000>;
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};
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i2c@7000c000 {
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status = "okay";
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clock-frequency = <100000>;
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};
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i2c@7000c400 {
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status = "okay";
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clock-frequency = <100000>;
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};
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i2c@7000c500 {
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status = "okay";
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clock-frequency = <100000>;
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};
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i2c@7000c700 {
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status = "okay";
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clock-frequency = <100000>;
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};
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i2c@7000d000 {
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status = "okay";
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clock-frequency = <400000>;
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};
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};
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