mirror of
https://github.com/brain-hackers/u-boot-brain
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2c95211167
* Boot failures have been discovered due to a combination of routing issues and non optimal ddr3 timings in the EMIF * Since ddr3 timings are different after significant board layout changes different timings are required for alpha, beta and production boards. Signed-off-by: Franklin S. Cooper Jr <fcooper@ti.com>
37 lines
1.0 KiB
C
37 lines
1.0 KiB
C
/*
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* omap.h
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*
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* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* Author:
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* Chandan Nath <chandan.nath@ti.com>
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*
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* Derived from OMAP4 work by
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* Aneesh V <aneesh@ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _OMAP_H_
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#define _OMAP_H_
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#ifdef CONFIG_AM33XX
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#define NON_SECURE_SRAM_START 0x402F0400
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#define NON_SECURE_SRAM_END 0x40310000
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#define SRAM_SCRATCH_SPACE_ADDR 0x4030B800
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#elif defined(CONFIG_TI81XX)
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#define NON_SECURE_SRAM_START 0x40300000
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#define NON_SECURE_SRAM_END 0x40320000
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#define SRAM_SCRATCH_SPACE_ADDR 0x4031B800
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#elif defined(CONFIG_AM43XX)
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#define NON_SECURE_SRAM_START 0x402F0400
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#define NON_SECURE_SRAM_END 0x40340000
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#define SRAM_SCRATCH_SPACE_ADDR 0x40337C00
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#define AM4372_BOARD_NAME_START SRAM_SCRATCH_SPACE_ADDR
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#define AM4372_BOARD_NAME_END SRAM_SCRATCH_SPACE_ADDR + 0xC
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#define AM4372_BOARD_VERSION_START SRAM_SCRATCH_SPACE_ADDR + 0xD
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#define AM4372_BOARD_VERSION_END SRAM_SCRATCH_SPACE_ADDR + 0x14
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#define QSPI_BASE 0x47900000
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#endif
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#endif
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