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The V bit of the c1 register of CP15 should not be cleared on DA850 SoCs since they have no valid memory at 0x00000000. This patch introduces a configuration option CONFIG_SYS_EXCEPTION_VECTORS_HIGH that allows setting the correct value for the V bit. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Reported-by: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Heiko Schocher <hs@denx.de> |
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armada100 | ||
at91 | ||
davinci | ||
kirkwood | ||
mb86r0x | ||
mx25 | ||
mx27 | ||
mx28 | ||
nomadik | ||
omap | ||
orion5x | ||
pantheon | ||
spear | ||
versatile | ||
cache.c | ||
config.mk | ||
cpu.c | ||
Makefile | ||
start.S | ||
u-boot.lds |