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https://github.com/brain-hackers/u-boot-brain
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This training code provides run-time adjustment of DDR PHY parameters for stable DDR operation. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
11 lines
345 B
Makefile
11 lines
345 B
Makefile
#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
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obj-$(if $(CONFIG_OF_CONTROL),,y) += platdevice.o
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obj-y += boot-mode.o
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obj-$(CONFIG_SOC_INIT) += sbc_init.o sg_init.o pll_init.o clkrst_init.o
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obj-$(CONFIG_BOARD_POSTCLK_INIT) += pinctrl.o
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obj-$(CONFIG_DRAM_INIT) += pll_spectrum.o umc_init.o ddrphy_init.o
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