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https://github.com/brain-hackers/u-boot-brain
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9095846655
This is available on AT91SAM9G45. Add the peripheral address and flag definitions. Signed-off-by: Andre Renaud <andre@designa-electronics.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
22 lines
580 B
C
22 lines
580 B
C
/*
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* Copyright (C) 2016 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef AT91_SCK_H
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#define AT91_SCK_H
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/*
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* SCKCR flags
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*/
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#define AT91SAM9G45_SCKCR_RCEN (1 << 0) /* RC Oscillator Enable */
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#define AT91SAM9G45_SCKCR_OSC32EN (1 << 1) /* 32kHz Oscillator Enable */
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#define AT91SAM9G45_SCKCR_OSC32BYP (1 << 2) /* 32kHz Oscillator Bypass */
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#define AT91SAM9G45_SCKCR_OSCSEL (1 << 3) /* Slow Clock Selector */
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#define AT91SAM9G45_SCKCR_OSCSEL_RC (0 << 3)
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#define AT91SAM9G45_SCKCR_OSCSEL_32 (1 << 3)
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#endif
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