mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-21 10:38:00 +09:00
b5b6b01960
On x86 boards, platform chipset receives up to four different interrupt signals from PCI devices (INTA/B/C/D), which in turn will be routed to chipset internal PIRQ lines then routed to 8259 PIC finally if configuring the whole system to work under the so-called PIC mode (in contrast to symmetric IO mode which uses IOAPIC). We add two major APIs to aid this, one for routing PIRQ and the other one for generating a PIRQ routing table. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
130 lines
2.8 KiB
C
130 lines
2.8 KiB
C
/*
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* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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*
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* Part of this file is ported from coreboot src/arch/x86/boot/pirq_routing.c
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <pci.h>
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#include <asm/pci.h>
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#include <asm/pirq_routing.h>
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#include <asm/tables.h>
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static bool irq_already_routed[16];
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static u8 pirq_get_next_free_irq(u8 *pirq, u16 bitmap)
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{
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int i, link;
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u8 irq = 0;
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/* IRQ sharing starts from IRQ#3 */
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for (i = 3; i < 16; i++) {
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/* Can we assign this IRQ? */
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if (!((bitmap >> i) & 1))
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continue;
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/* We can, now let's assume we can use this IRQ */
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irq = i;
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/* Have we already routed it? */
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if (irq_already_routed[irq])
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continue;
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for (link = 0; link < CONFIG_MAX_PIRQ_LINKS; link++) {
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if (pirq_check_irq_routed(link, irq)) {
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irq_already_routed[irq] = true;
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break;
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}
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}
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/* If it's not yet routed, use it */
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if (!irq_already_routed[irq]) {
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irq_already_routed[irq] = true;
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break;
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}
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/* But if it was already routed, try the next one */
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}
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/* Now we get our IRQ */
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return irq;
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}
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void pirq_route_irqs(struct irq_info *irq, int num)
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{
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unsigned char irq_slot[MAX_INTX_ENTRIES];
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unsigned char pirq[CONFIG_MAX_PIRQ_LINKS];
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int i, intx;
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memset(pirq, 0, CONFIG_MAX_PIRQ_LINKS);
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/* Set PCI IRQs */
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for (i = 0; i < num; i++) {
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debug("PIRQ Entry %d Dev: %d.%x.%d\n", i,
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irq->bus, irq->devfn >> 3, irq->devfn & 7);
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for (intx = 0; intx < MAX_INTX_ENTRIES; intx++) {
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int link = irq->irq[intx].link;
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int bitmap = irq->irq[intx].bitmap;
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int irq = 0;
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debug("INT%c link: %x bitmap: %x ",
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'A' + intx, link, bitmap);
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if (!bitmap || !link) {
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debug("not routed\n");
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irq_slot[intx] = irq;
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continue;
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}
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/* translate link value to link number */
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link = pirq_translate_link(link);
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/* yet not routed */
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if (!pirq[link]) {
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irq = pirq_get_next_free_irq(pirq, bitmap);
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pirq[link] = irq;
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} else {
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irq = pirq[link];
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}
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debug("IRQ: %d\n", irq);
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irq_slot[intx] = irq;
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/* Assign IRQ in the interrupt router */
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pirq_assign_irq(link, irq);
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}
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/* Bus, device, slots IRQs for {A,B,C,D} */
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pci_assign_irqs(irq->bus, irq->devfn >> 3, irq->devfn & 7,
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irq_slot);
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irq++;
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}
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for (i = 0; i < CONFIG_MAX_PIRQ_LINKS; i++)
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debug("PIRQ%c: %d\n", 'A' + i, pirq[i]);
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}
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u32 copy_pirq_routing_table(u32 addr, struct irq_routing_table *rt)
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{
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if (rt->signature != PIRQ_SIGNATURE || rt->version != PIRQ_VERSION ||
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rt->size % 16) {
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debug("Interrupt Routing Table not valid\n");
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return addr;
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}
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/* Fix up the table checksum */
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rt->checksum = table_compute_checksum(rt, rt->size);
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/* Align the table to be 16 byte aligned */
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addr = ALIGN(addr, 16);
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debug("Copying Interrupt Routing Table to 0x%x\n", addr);
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memcpy((void *)addr, rt, rt->size);
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return addr + rt->size;
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}
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