mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-16 15:13:46 +09:00
b5b6b01960
On x86 boards, platform chipset receives up to four different interrupt signals from PCI devices (INTA/B/C/D), which in turn will be routed to chipset internal PIRQ lines then routed to 8259 PIC finally if configuring the whole system to work under the so-called PIC mode (in contrast to symmetric IO mode which uses IOAPIC). We add two major APIs to aid this, one for routing PIRQ and the other one for generating a PIRQ routing table. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
41 lines
1.0 KiB
Makefile
41 lines
1.0 KiB
Makefile
#
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# (C) Copyright 2002-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += bios.o
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obj-y += bios_asm.o
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obj-y += bios_interrupts.o
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obj-$(CONFIG_CMD_BOOTM) += bootm.o
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obj-y += cmd_boot.o
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obj-$(CONFIG_HAVE_FSP) += cmd_hob.o
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obj-y += gcc.o
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obj-y += init_helpers.o
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obj-y += interrupts.o
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obj-y += lpc-uclass.o
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obj-y += cmd_mtrr.o
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obj-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o
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obj-$(CONFIG_SYS_PCAT_TIMER) += pcat_timer.o
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ifndef CONFIG_DM_PCI
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obj-$(CONFIG_PCI) += pci_type1.o
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endif
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obj-y += pch-uclass.o
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obj-y += pirq_routing.o
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obj-y += relocate.o
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obj-y += physmem.o
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obj-$(CONFIG_X86_RAMTEST) += ramtest.o
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obj-y += string.o
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obj-y += tables.o
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obj-$(CONFIG_SYS_X86_TSC_TIMER) += tsc_timer.o
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obj-$(CONFIG_CMD_ZBOOT) += zimage.o
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obj-$(CONFIG_HAVE_FSP) += fsp/
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extra-$(CONFIG_USE_PRIVATE_LIBGCC) := lib.a
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NORMAL_LIBGCC = $(shell $(CC) $(PLATFORM_CPPFLAGS) -print-libgcc-file-name)
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OBJCOPYFLAGS := --prefix-symbols=__normal_
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$(obj)/lib.a: $(NORMAL_LIBGCC) FORCE
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$(call if_changed,objcopy)
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