mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-08 12:16:16 +09:00
b5a152e7ca
Default "reset" from U-Boot to L3 reset. "reset" command with argument will trigger L1 reset. Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com> Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
94 lines
1.7 KiB
C
94 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2020 Broadcom.
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*
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/system.h>
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#include <asm/armv8/mmu.h>
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#include <asm/arch-bcmns3/bl33_info.h>
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/* Default reset-level = 3 and strap-val = 0 */
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#define L3_RESET 30
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static struct mm_region ns3_mem_map[] = {
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{
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.virt = 0x0UL,
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.phys = 0x0UL,
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.size = 0x80000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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.virt = 0x80000000UL,
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.phys = 0x80000000UL,
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.size = 0x80000000UL,
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.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
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PTE_BLOCK_INNER_SHARE
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}, {
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/* List terminator */
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0,
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}
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};
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struct mm_region *mem_map = ns3_mem_map;
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Force the bl33_info to the data-section, as .bss will not be valid
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* when save_boot_params is invoked.
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*/
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struct bl33_info *bl33_info __section(".data");
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int board_init(void)
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{
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if (bl33_info->version != BL33_INFO_VERSION)
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printf("*** warning: ATF BL31 and U-Boot not in sync! ***\n");
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return 0;
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}
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int board_late_init(void)
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{
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return 0;
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}
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int dram_init(void)
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{
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if (fdtdec_setup_mem_size_base() != 0)
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return -EINVAL;
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return 0;
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}
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int dram_init_banksize(void)
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{
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fdtdec_setup_memory_banksize();
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return 0;
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}
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void reset_cpu(ulong level)
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{
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u32 reset_level, strap_val;
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/* Default reset type is L3 reset */
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if (!level) {
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/*
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* Encoding: U-Boot reset command expects decimal argument,
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* Boot strap val: Bits[3:0]
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* reset level: Bits[7:4]
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*/
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strap_val = L3_RESET % 10;
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level = L3_RESET / 10;
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reset_level = level % 10;
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psci_system_reset2(reset_level, strap_val);
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} else {
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/* U-Boot cmd "reset" with any arg will trigger L1 reset */
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psci_system_reset();
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}
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}
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