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https://github.com/brain-hackers/u-boot-brain
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a47a12becf
As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Acked-by: Kim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>
69 lines
2.0 KiB
C
69 lines
2.0 KiB
C
/*
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* (C) Copyright 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* This file is based on code
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* (C) Copyright Motorola, Inc., 2000
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*
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* MPC8220 dma header file
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*/
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#ifndef __MPC8220_DMA_H
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#define __MPC8220_DMA_H
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#include <common.h>
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#include <mpc8220.h>
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/* Task number assignment */
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#define FEC_RECV_TASK_NO 0
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#define FEC_XMIT_TASK_NO 1
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/*---------------------------------------------------------------------
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* Stuff for Ethernet Tx/Rx tasks
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*---------------------------------------------------------------------
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*/
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/* Layout of Ethernet controller Parameter SRAM area:
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* ----------------------------------------------------------------
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* 0x00: TBD_BASE, base address of TX BD ring
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* 0x04: TBD_NEXT, address of next TX BD to be processed
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* 0x08: RBD_BASE, base address of RX BD ring
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* 0x0C: RBD_NEXT, address of next RX BD to be processed
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* ---------------------------------------------------------------
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* ALL PARAMETERS ARE ALL LONGWORDS (FOUR BYTES EACH).
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*/
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/* base address of SRAM area to store parameters used by Ethernet tasks */
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#define FEC_PARAM_BASE (MMAP_SRAM + 0x5b00)
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/* base address of SRAM area for buffer descriptors */
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#define FEC_BD_BASE (MMAP_SRAM + 0x5b20)
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/*---------------------------------------------------------------------
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* common shortcuts used by driver C code
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*---------------------------------------------------------------------
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*/
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/* Disable SmartDMA task */
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#define DMA_TASK_DISABLE(tasknum) \
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{ \
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volatile ushort *tcr = (ushort *)(MMAP_DMA + 0x0000001c + 2 * tasknum); \
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*tcr = (*tcr) & (~0x8000); \
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}
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/* Enable SmartDMA task */
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#define DMA_TASK_ENABLE(tasknum) \
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{ \
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volatile ushort *tcr = (ushort *) (MMAP_DMA + 0x0000001c + 2 * tasknum);\
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*tcr = (*tcr) | 0x8000; \
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}
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/* Clear interrupt pending bits */
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#define DMA_CLEAR_IEVENT(tasknum) \
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{ \
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struct mpc8220_dma *dma = (struct mpc8220_dma *)MMAP_DMA; \
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dma->IntPend = (1 << tasknum); \
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}
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#endif /* __MPC8220_DMA_H */
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