Chris Zhong b5788dc0dd rockchip: rk3288: correct sdram setting ... The DMC driver in v3.14 kernel[0] get the ddr setting from PMU_SYS_REG2, and it expects uboot to store the value using a same protocol. But now the ddr setting value is different with DMC, so if you enable the DMC, system would crash in kernel. Correct the sdram setting here, according to the requirements of kernel. [0] https://chromium.googlesource.com/chromiumos/third_party/kernel/+/ chromeos-3.14/drivers/clk/rockchip/clk-rk3288-dmc.c Signed-off-by: Chris Zhong <zyw@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>		2016-03-10 08:32:01 -07:00
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Kconfig	rockchip: Add support for Raxda Rock 2	2016-01-21 20:42:37 -07:00
Makefile	rockchip: rk3288: Add SDRAM init	2015-09-02 21:28:24 -06:00
reset_rk3288.c	rockchip: reset: Use the rk_clr/setreg() interface	2016-01-21 20:42:35 -07:00
sdram_rk3288.c	rockchip: rk3288: correct sdram setting	2016-03-10 08:32:01 -07:00
syscon_rk3288.c	rockchip: rk3288: Add a simple syscon driver	2015-09-02 21:28:24 -06:00