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![Simon Glass](/assets/img/avatar_default.png)
Implement this API function for TPM2. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
286 lines
5.8 KiB
C
286 lines
5.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019 Google LLC
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*/
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#include <common.h>
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#include <dm.h>
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#include <log.h>
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#include <tpm_api.h>
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#include <tpm-v1.h>
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#include <tpm-v2.h>
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#include <tpm_api.h>
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static bool is_tpm1(struct udevice *dev)
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{
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return IS_ENABLED(CONFIG_TPM_V1) && tpm_get_version(dev) == TPM_V1;
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}
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static bool is_tpm2(struct udevice *dev)
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{
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return IS_ENABLED(CONFIG_TPM_V2) && tpm_get_version(dev) == TPM_V2;
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}
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u32 tpm_startup(struct udevice *dev, enum tpm_startup_type mode)
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{
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if (is_tpm1(dev)) {
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return tpm1_startup(dev, mode);
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} else if (is_tpm2(dev)) {
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enum tpm2_startup_types type;
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switch (mode) {
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case TPM_ST_CLEAR:
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type = TPM2_SU_CLEAR;
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break;
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case TPM_ST_STATE:
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type = TPM2_SU_STATE;
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break;
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default:
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case TPM_ST_DEACTIVATED:
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return -EINVAL;
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}
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return tpm2_startup(dev, type);
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} else {
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return -ENOSYS;
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}
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}
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u32 tpm_resume(struct udevice *dev)
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{
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if (is_tpm1(dev))
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return tpm1_startup(dev, TPM_ST_STATE);
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else if (is_tpm2(dev))
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return tpm2_startup(dev, TPM2_SU_STATE);
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else
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return -ENOSYS;
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}
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u32 tpm_self_test_full(struct udevice *dev)
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{
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if (is_tpm1(dev))
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return tpm1_self_test_full(dev);
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else if (is_tpm2(dev))
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return tpm2_self_test(dev, TPMI_YES);
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else
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return -ENOSYS;
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}
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u32 tpm_continue_self_test(struct udevice *dev)
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{
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if (is_tpm1(dev))
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return tpm1_continue_self_test(dev);
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else if (is_tpm2(dev))
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return tpm2_self_test(dev, TPMI_NO);
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else
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return -ENOSYS;
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}
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u32 tpm_clear_and_reenable(struct udevice *dev)
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{
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u32 ret;
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log_info("TPM: Clear and re-enable\n");
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ret = tpm_force_clear(dev);
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if (ret != TPM_SUCCESS) {
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log_err("Can't initiate a force clear\n");
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return ret;
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}
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if (is_tpm1(dev)) {
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ret = tpm1_physical_enable(dev);
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if (ret != TPM_SUCCESS) {
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log_err("TPM: Can't set enabled state\n");
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return ret;
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}
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ret = tpm1_physical_set_deactivated(dev, 0);
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if (ret != TPM_SUCCESS) {
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log_err("TPM: Can't set deactivated state\n");
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return ret;
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}
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}
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return TPM_SUCCESS;
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}
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u32 tpm_nv_enable_locking(struct udevice *dev)
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{
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if (is_tpm1(dev))
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return tpm1_nv_define_space(dev, TPM_NV_INDEX_LOCK, 0, 0);
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else if (is_tpm2(dev))
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return -ENOSYS;
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else
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return -ENOSYS;
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}
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u32 tpm_nv_read_value(struct udevice *dev, u32 index, void *data, u32 count)
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{
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if (is_tpm1(dev))
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return tpm1_nv_read_value(dev, index, data, count);
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else if (is_tpm2(dev))
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return tpm2_nv_read_value(dev, index, data, count);
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else
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return -ENOSYS;
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}
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u32 tpm_nv_write_value(struct udevice *dev, u32 index, const void *data,
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u32 count)
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{
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if (is_tpm1(dev))
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return tpm1_nv_write_value(dev, index, data, count);
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else if (is_tpm2(dev))
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return tpm2_nv_write_value(dev, index, data, count);
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else
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return -ENOSYS;
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}
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u32 tpm_set_global_lock(struct udevice *dev)
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{
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return tpm_nv_write_value(dev, TPM_NV_INDEX_0, NULL, 0);
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}
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u32 tpm_write_lock(struct udevice *dev, u32 index)
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{
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if (is_tpm1(dev))
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return -ENOSYS;
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else if (is_tpm2(dev))
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return tpm2_write_lock(dev, index);
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else
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return -ENOSYS;
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}
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u32 tpm_pcr_extend(struct udevice *dev, u32 index, const void *in_digest,
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void *out_digest)
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{
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if (is_tpm1(dev))
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return tpm1_extend(dev, index, in_digest, out_digest);
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else if (is_tpm2(dev))
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return tpm2_pcr_extend(dev, index, TPM2_ALG_SHA256, in_digest,
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TPM2_DIGEST_LEN);
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else
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return -ENOSYS;
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}
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u32 tpm_pcr_read(struct udevice *dev, u32 index, void *data, size_t count)
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{
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if (is_tpm1(dev))
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return tpm1_pcr_read(dev, index, data, count);
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else if (is_tpm2(dev))
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return -ENOSYS;
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else
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return -ENOSYS;
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}
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u32 tpm_tsc_physical_presence(struct udevice *dev, u16 presence)
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{
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if (is_tpm1(dev))
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return tpm1_tsc_physical_presence(dev, presence);
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/*
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* Nothing to do on TPM2 for this; use platform hierarchy availability
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* instead.
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*/
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else if (is_tpm2(dev))
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return 0;
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else
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return -ENOSYS;
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}
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u32 tpm_finalise_physical_presence(struct udevice *dev)
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{
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if (is_tpm1(dev))
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return tpm1_finalise_physical_presence(dev);
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/* Nothing needs to be done with tpm2 */
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else if (is_tpm2(dev))
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return 0;
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else
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return -ENOSYS;
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}
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u32 tpm_read_pubek(struct udevice *dev, void *data, size_t count)
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{
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if (is_tpm1(dev))
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return tpm1_read_pubek(dev, data, count);
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else if (is_tpm2(dev))
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return -ENOSYS; /* not implemented yet */
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else
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return -ENOSYS;
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}
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u32 tpm_force_clear(struct udevice *dev)
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{
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if (is_tpm1(dev))
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return tpm1_force_clear(dev);
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else if (is_tpm2(dev))
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return tpm2_clear(dev, TPM2_RH_PLATFORM, NULL, 0);
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else
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return -ENOSYS;
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}
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u32 tpm_physical_enable(struct udevice *dev)
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{
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if (is_tpm1(dev))
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return tpm1_physical_enable(dev);
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/* Nothing needs to be done with tpm2 */
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else if (is_tpm2(dev))
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return 0;
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else
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return -ENOSYS;
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}
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u32 tpm_physical_disable(struct udevice *dev)
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{
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if (is_tpm1(dev))
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return tpm1_physical_disable(dev);
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/* Nothing needs to be done with tpm2 */
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else if (is_tpm2(dev))
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return 0;
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else
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return -ENOSYS;
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}
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u32 tpm_physical_set_deactivated(struct udevice *dev, u8 state)
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{
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if (is_tpm1(dev))
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return tpm1_physical_set_deactivated(dev, state);
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/* Nothing needs to be done with tpm2 */
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else if (is_tpm2(dev))
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return 0;
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else
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return -ENOSYS;
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}
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u32 tpm_get_capability(struct udevice *dev, u32 cap_area, u32 sub_cap,
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void *cap, size_t count)
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{
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if (is_tpm1(dev))
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return tpm1_get_capability(dev, cap_area, sub_cap, cap, count);
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else if (is_tpm2(dev))
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return tpm2_get_capability(dev, cap_area, sub_cap, cap, count);
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else
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return -ENOSYS;
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}
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u32 tpm_get_permissions(struct udevice *dev, u32 index, u32 *perm)
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{
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if (is_tpm1(dev))
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return tpm1_get_permissions(dev, index, perm);
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else if (is_tpm2(dev))
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return -ENOSYS; /* not implemented yet */
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else
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return -ENOSYS;
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}
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u32 tpm_get_random(struct udevice *dev, void *data, u32 count)
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{
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if (is_tpm1(dev))
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return tpm1_get_random(dev, data, count);
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else if (is_tpm2(dev))
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return -ENOSYS; /* not implemented yet */
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else
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return -ENOSYS;
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}
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