Marcel Ziswiler b4f9010428 apalis_t30: fix pcie port 0 and 1 pin muxing ... Fix optional Apalis type specific 4 lane PCIe port 0 and Apalis PCIe port 1 pin muxing. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>		2018-05-10 16:34:30 -07:00
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apalis_t30.c	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
Kconfig	apalis/colibri_imx7/pxa270/t20/t30/vf: integrate config block handling	2016-11-28 15:10:33 -05:00
MAINTAINERS	arm: tegra: initial support for apalis t30	2014-10-22 09:30:54 -07:00
Makefile	ARM: tegra: move NVIDIA common files to arch/arm/mach-tegra	2015-05-13 09:46:19 -07:00
pinmux-config-apalis_t30.h	apalis_t30: fix pcie port 0 and 1 pin muxing	2018-05-10 16:34:30 -07:00