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![Haiying Wang](/assets/img/avatar_default.png)
Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command is fully finished. The sync() is defined in each CPU's io.h file. For those CPUs which do not need sync for now, a dummy sync() is defined in their io.h as well. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
133 lines
3.6 KiB
C
133 lines
3.6 KiB
C
/*
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* include/asm-microblaze/io.h -- Misc I/O operations
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*
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* Copyright (C) 2003 John Williams <jwilliams@itee.uq.edu.au>
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* Copyright (C) 2001,02 NEC Corporation
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* Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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* Written by Miles Bader <miles@gnu.org>
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* Microblaze port by John Williams
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*/
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#ifndef __MICROBLAZE_IO_H__
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#define __MICROBLAZE_IO_H__
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#define IO_SPACE_LIMIT 0xFFFFFFFF
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#define readb(addr) \
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({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })
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#define readw(addr) \
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({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; })
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#define readl(addr) \
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({ unsigned long __v = (*(volatile unsigned long *) (addr)); __v; })
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#define writeb(b, addr) \
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(void)((*(volatile unsigned char *) (addr)) = (b))
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#define writew(b, addr) \
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(void)((*(volatile unsigned short *) (addr)) = (b))
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#define writel(b, addr) \
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(void)((*(volatile unsigned int *) (addr)) = (b))
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#define memset_io(a,b,c) memset((void *)(a),(b),(c))
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#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
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#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
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#define inb(addr) readb (addr)
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#define inw(addr) readw (addr)
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#define inl(addr) readl (addr)
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#define outb(x, addr) ((void) writeb (x, addr))
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#define outw(x, addr) ((void) writew (x, addr))
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#define outl(x, addr) ((void) writel (x, addr))
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/* Some #definitions to keep strange Xilinx code happy */
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#define in_8(addr) readb (addr)
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#define in_be16(addr) readw (addr)
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#define in_be32(addr) readl (addr)
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#define out_8(addr,x ) outb (x,addr)
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#define out_be16(addr,x ) outw (x,addr)
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#define out_be32(addr,x ) outl (x,addr)
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#define inb_p(port) inb((port))
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#define outb_p(val, port) outb((val), (port))
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#define inw_p(port) inw((port))
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#define outw_p(val, port) outw((val), (port))
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#define inl_p(port) inl((port))
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#define outl_p(val, port) outl((val), (port))
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/* Some defines to keep the MTD flash drivers happy */
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#define __raw_readb readb
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#define __raw_readw readw
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#define __raw_readl readl
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#define __raw_writeb writeb
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#define __raw_writew writew
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#define __raw_writel writel
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static inline void io_insb (unsigned long port, void *dst, unsigned long count)
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{
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unsigned char *p = dst;
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while (count--)
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*p++ = inb (port);
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}
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static inline void io_insw (unsigned long port, void *dst, unsigned long count)
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{
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unsigned short *p = dst;
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while (count--)
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*p++ = inw (port);
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}
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static inline void io_insl (unsigned long port, void *dst, unsigned long count)
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{
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unsigned long *p = dst;
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while (count--)
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*p++ = inl (port);
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}
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static inline void
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io_outsb (unsigned long port, const void *src, unsigned long count)
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{
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const unsigned char *p = src;
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while (count--)
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outb (*p++, port);
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}
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static inline void
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io_outsw (unsigned long port, const void *src, unsigned long count)
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{
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const unsigned short *p = src;
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while (count--)
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outw (*p++, port);
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}
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static inline void
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io_outsl (unsigned long port, const void *src, unsigned long count)
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{
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const unsigned long *p = src;
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while (count--)
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outl (*p++, port);
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}
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#define outsb(a,b,l) io_outsb(a,b,l)
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#define outsw(a,b,l) io_outsw(a,b,l)
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#define outsl(a,b,l) io_outsl(a,b,l)
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#define insb(a,b,l) io_insb(a,b,l)
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#define insw(a,b,l) io_insw(a,b,l)
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#define insl(a,b,l) io_insl(a,b,l)
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#define iounmap(addr) ((void)0)
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#define ioremap(physaddr, size) (physaddr)
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#define ioremap_nocache(physaddr, size) (physaddr)
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#define ioremap_writethrough(physaddr, size) (physaddr)
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#define ioremap_fullcache(physaddr, size) (physaddr)
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static inline void sync(void)
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{
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}
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#endif /* __MICROBLAZE_IO_H__ */
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