mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-09 20:56:16 +09:00
b312c590bc
This patch adds SD/MMC support for STM32H7 SoCs.
Here is an extraction of SDMMC main features, embedded in
STM32H7 SoCs.
The SD/MMC block include the following:
_ Full compliance with MultiMediaCard System Specification
Version 4.51. Card support for three different databus modes:
1-bit (default), 4-bit and 8-bit.
_ Full compatibility with previous versions of MultiMediaCards
(backward compatibility).
_ Full compliance with SD memory card specifications version 4.1.
(SDR104 SDMMC_CK speed limited to maximum allowed IO speed,
SPI mode and UHS-II mode not supported).
_ Full compliance with SDIO card specification version 4.0.
Card support for two different databus modes: 1-bit (default)
and 4-bit. (SDR104 SDMMC_CK speed limited to maximum allowed IO
speed, SPI mode and UHS-II mode not supported).
_ Data transfer up to 208 Mbyte/s for the 8 bit mode.
(depending maximum allowed IO speed).
_ Data and command output enable signals to control external
bidirectional drivers.
The current version of the SDMMC supports only one SD/SDIO/MMC card
at any one time and a stack of MMC Version 4.51 or previous.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
68 lines
2.2 KiB
Makefile
68 lines
2.2 KiB
Makefile
#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += mmc.o
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obj-$(CONFIG_$(SPL_)DM_MMC) += mmc-uclass.o
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ifndef CONFIG_$(SPL_)BLK
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obj-y += mmc_legacy.o
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endif
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obj-$(CONFIG_SUPPORT_EMMC_BOOT) += mmc_boot.o
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ifdef CONFIG_SPL_BUILD
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obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
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obj-$(CONFIG_SPL_SAVEENV) += mmc_write.o
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else
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obj-y += mmc_write.o
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endif
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obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o
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obj-$(CONFIG_MMC_DAVINCI) += davinci_mmc.o
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obj-$(CONFIG_MMC_DW) += dw_mmc.o
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obj-$(CONFIG_MMC_DW_EXYNOS) += exynos_dw_mmc.o
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obj-$(CONFIG_MMC_DW_K3) += hi6220_dw_mmc.o
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obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o
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obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o
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obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
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obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o
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obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o
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obj-$(CONFIG_MMC_MESON_GX) += meson_gx_mmc.o
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obj-$(CONFIG_MMC_SPI) += mmc_spi.o
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obj-$(CONFIG_MVEBU_MMC) += mvebu_mmc.o
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obj-$(CONFIG_MMC_OMAP_HS) += omap_hsmmc.o
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obj-$(CONFIG_MMC_MXC) += mxcmmc.o
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obj-$(CONFIG_MMC_MXS) += mxsmmc.o
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obj-$(CONFIG_MMC_PCI) += pci_mmc.o
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obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
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obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o
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obj-$(CONFIG_MMC_SANDBOX) += sandbox_mmc.o
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obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
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obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
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obj-$(CONFIG_STM32_SDMMC2) += stm32_sdmmc2.o
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# SDHCI
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obj-$(CONFIG_MMC_SDHCI) += sdhci.o
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obj-$(CONFIG_MMC_SDHCI_ATMEL) += atmel_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_BCM2835) += bcm2835_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_CADENCE) += sdhci-cadence.o
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obj-$(CONFIG_MMC_SDHCI_KONA) += kona_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_MSM) += msm_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_MV) += mv_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_PIC32) += pic32_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_ROCKCHIP) += rockchip_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_S5P) += s5p_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_SPEAR) += spear_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_STI) += sti_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_TANGIER) += tangier_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_TEGRA) += tegra_mmc.o
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obj-$(CONFIG_MMC_SDHCI_XENON) += xenon_sdhci.o
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obj-$(CONFIG_MMC_SDHCI_ZYNQ) += zynq_sdhci.o
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obj-$(CONFIG_MMC_SUNXI) += sunxi_mmc.o
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obj-$(CONFIG_MMC_UNIPHIER) += uniphier-sd.o
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