mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-11 13:46:17 +09:00
d47cb0b61a
The code such as PSCI in section named secure is bundled with u-boot image, and when bootm, the code will be copied to their runtime address same to compliation/linking address - CONFIG_ARMV7_SECURE_BASE. When compile the PSCI code and link it into the u-boot image, there will be relocation entries in .rel.dyn section for PSCI. Actually, we do not needs these relocation entries. If still keep the relocation entries in .rel.dyn section, r0 at line 103 and 106 in arch/arm/lib/relocate.S may be an invalid address which may not support read/write for one SoC. 102 /* relative fix: increase location by offset */ 103 add r0, r0, r4 104 ldr r1, [r0] 105 add r1, r1, r4 106 str r1, [r0] So discard them to avoid touching the relocation entry in arch/arm/lib/relocate.S. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Tom Warren <twarren@nvidia.com> Cc: York Sun <yorksun@freescale.com> Cc: Hans De Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Cc: Jan Kiszka <jan.kiszka@siemens.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
158 lines
3.0 KiB
Plaintext
158 lines
3.0 KiB
Plaintext
/*
|
|
* Copyright (c) 2004-2008 Texas Instruments
|
|
*
|
|
* (C) Copyright 2002
|
|
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <config.h>
|
|
|
|
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
|
OUTPUT_ARCH(arm)
|
|
ENTRY(_start)
|
|
SECTIONS
|
|
{
|
|
/*
|
|
* Discard the relocation entries for secure text.
|
|
* The secure code is bundled with u-boot image, so there will
|
|
* be relocations entries for the secure code, since we use
|
|
* "-mword-relocations" to compile and "-pie" to link into the
|
|
* final image. We do not need the relocation entries for secure
|
|
* code, because secure code will not be relocated, it only needs
|
|
* to be copied from loading address to CONFIG_ARMV7_SECURE_BASE,
|
|
* which is the linking and running address for secure code.
|
|
* If keep the relocation entries in .rel.dyn section,
|
|
* "relocation offset + linking address" may locates into an
|
|
* address that is reserved by SoC, then will trigger data abort.
|
|
*
|
|
* The reason that move .rel._secure at the beginning, is to
|
|
* avoid hole in the final image.
|
|
*/
|
|
/DISCARD/ : { *(.rel._secure*) }
|
|
. = 0x00000000;
|
|
|
|
. = ALIGN(4);
|
|
.text :
|
|
{
|
|
*(.__image_copy_start)
|
|
*(.vectors)
|
|
CPUDIR/start.o (.text*)
|
|
*(.text*)
|
|
}
|
|
|
|
#ifdef CONFIG_ARMV7_NONSEC
|
|
|
|
#ifndef CONFIG_ARMV7_SECURE_BASE
|
|
#define CONFIG_ARMV7_SECURE_BASE
|
|
#endif
|
|
|
|
.__secure_start : {
|
|
. = ALIGN(0x1000);
|
|
*(.__secure_start)
|
|
}
|
|
|
|
.secure_text CONFIG_ARMV7_SECURE_BASE :
|
|
AT(ADDR(.__secure_start) + SIZEOF(.__secure_start))
|
|
{
|
|
*(._secure.text)
|
|
}
|
|
|
|
. = LOADADDR(.__secure_start) +
|
|
SIZEOF(.__secure_start) +
|
|
SIZEOF(.secure_text);
|
|
|
|
__secure_end_lma = .;
|
|
.__secure_end : AT(__secure_end_lma) {
|
|
*(.__secure_end)
|
|
LONG(0x1d1071c); /* Must output something to reset LMA */
|
|
}
|
|
#endif
|
|
|
|
. = ALIGN(4);
|
|
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
|
|
|
|
. = ALIGN(4);
|
|
.data : {
|
|
*(.data*)
|
|
}
|
|
|
|
. = ALIGN(4);
|
|
|
|
. = .;
|
|
|
|
. = ALIGN(4);
|
|
.u_boot_list : {
|
|
KEEP(*(SORT(.u_boot_list*)));
|
|
}
|
|
|
|
. = ALIGN(4);
|
|
|
|
.image_copy_end :
|
|
{
|
|
*(.__image_copy_end)
|
|
}
|
|
|
|
.rel_dyn_start :
|
|
{
|
|
*(.__rel_dyn_start)
|
|
}
|
|
|
|
.rel.dyn : {
|
|
*(.rel*)
|
|
}
|
|
|
|
.rel_dyn_end :
|
|
{
|
|
*(.__rel_dyn_end)
|
|
}
|
|
|
|
.end :
|
|
{
|
|
*(.__end)
|
|
}
|
|
|
|
_image_binary_end = .;
|
|
|
|
/*
|
|
* Deprecated: this MMU section is used by pxa at present but
|
|
* should not be used by new boards/CPUs.
|
|
*/
|
|
. = ALIGN(4096);
|
|
.mmutable : {
|
|
*(.mmutable)
|
|
}
|
|
|
|
/*
|
|
* Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
|
|
* __bss_base and __bss_limit are for linker only (overlay ordering)
|
|
*/
|
|
|
|
.bss_start __rel_dyn_start (OVERLAY) : {
|
|
KEEP(*(.__bss_start));
|
|
__bss_base = .;
|
|
}
|
|
|
|
.bss __bss_base (OVERLAY) : {
|
|
*(.bss*)
|
|
. = ALIGN(4);
|
|
__bss_limit = .;
|
|
}
|
|
|
|
.bss_end __bss_limit (OVERLAY) : {
|
|
KEEP(*(.__bss_end));
|
|
}
|
|
|
|
.dynsym _image_binary_end : { *(.dynsym) }
|
|
.dynbss : { *(.dynbss) }
|
|
.dynstr : { *(.dynstr*) }
|
|
.dynamic : { *(.dynamic*) }
|
|
.plt : { *(.plt*) }
|
|
.interp : { *(.interp*) }
|
|
.gnu.hash : { *(.gnu.hash) }
|
|
.gnu : { *(.gnu*) }
|
|
.ARM.exidx : { *(.ARM.exidx*) }
|
|
.gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) }
|
|
}
|