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![Suneel Garapati](/assets/img/avatar_default.png)
Adds support for Network Interface controllers found on OcteonTX2 SoC platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com>
72 lines
1.4 KiB
C
72 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018 Marvell International Ltd.
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*/
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#include <dm.h>
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#include <errno.h>
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#include <malloc.h>
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#include <misc.h>
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#include <net.h>
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#include <asm/io.h>
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#include "rvu.h"
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int qmem_alloc(struct qmem *q, u32 qsize, size_t entry_sz)
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{
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q->base = memalign(CONFIG_SYS_CACHELINE_SIZE, qsize * entry_sz);
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if (!q->base)
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return -ENOMEM;
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q->entry_sz = entry_sz;
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q->qsize = qsize;
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q->alloc_sz = (size_t)qsize * entry_sz;
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q->iova = (dma_addr_t)(q->base);
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debug("NIX: qmem alloc for (%d * %d = %ld bytes) at %p\n",
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q->qsize, q->entry_sz, q->alloc_sz, q->base);
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return 0;
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}
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void qmem_free(struct qmem *q)
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{
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if (q->base)
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free(q->base);
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memset(q, 0, sizeof(*q));
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}
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/**
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* Allocates an admin queue for instructions and results
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*
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* @param aq admin queue to allocate for
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* @param qsize Number of entries in the queue
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* @param inst_size Size of each instruction
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* @param res_size Size of each result
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*
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* @return -ENOMEM on error, 0 on success
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*/
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int rvu_aq_alloc(struct admin_queue *aq, unsigned int qsize,
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size_t inst_size, size_t res_size)
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{
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int err;
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err = qmem_alloc(&aq->inst, qsize, inst_size);
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if (err)
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return err;
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err = qmem_alloc(&aq->res, qsize, res_size);
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if (err)
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qmem_free(&aq->inst);
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return err;
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}
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/**
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* Frees an admin queue
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*
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* @param aq Admin queue to free
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*/
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void rvu_aq_free(struct admin_queue *aq)
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{
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qmem_free(&aq->inst);
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qmem_free(&aq->res);
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memset(aq, 0, sizeof(*aq));
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}
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