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b377d22264
Some Rockchip BROM versions (e.g. the RK3188 and RK3066) first read 1KB data from NAND into SRAM and executes it. Then, following a return to bootrom, the BROM loads additional code to SRAM (not overwriting the first block read) and reenters at the same address as the first time. To support booting either a TPL (on the RK3066) or SPL (on the RK3188) using this model of having to count entries, this commit adds code to the boot0 hook to track the number of entries and handle them accordingly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com> Tested-by: Andy Yan <andy.yan@rock-chips.com> |
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| arc | ||
| arm | ||
| m68k | ||
| microblaze | ||
| mips | ||
| nds32 | ||
| nios2 | ||
| powerpc | ||
| sandbox | ||
| sh | ||
| x86 | ||
| xtensa | ||
| .gitignore | ||
| Kconfig | ||