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![Lukasz Majewski](/assets/img/avatar_default.png)
The struct uc_pmic_priv's trans_len field stores the number of types to be transmitted per PMIC transfer. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
331 lines
9.8 KiB
C
331 lines
9.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2014-2015 Samsung Electronics
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* Przemyslaw Marczak <p.marczak@samsung.com>
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*
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* Copyright (C) 2011-2012 Samsung Electronics
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* Lukasz Majewski <l.majewski@samsung.com>
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*/
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#ifndef __CORE_PMIC_H_
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#define __CORE_PMIC_H_
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#include <dm/ofnode.h>
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#include <i2c.h>
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#include <linux/list.h>
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#include <power/power_chrg.h>
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enum { PMIC_I2C, PMIC_SPI, PMIC_NONE};
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#ifdef CONFIG_POWER
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enum { I2C_PMIC, I2C_NUM, };
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enum { PMIC_READ, PMIC_WRITE, };
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enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, };
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enum {
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PMIC_CHARGER_DISABLE,
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PMIC_CHARGER_ENABLE,
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};
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struct p_i2c {
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unsigned char addr;
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unsigned char *buf;
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unsigned char tx_num;
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};
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struct p_spi {
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unsigned int cs;
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unsigned int mode;
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unsigned int bitlen;
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unsigned int clk;
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unsigned int flags;
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u32 (*prepare_tx)(u32 reg, u32 *val, u32 write);
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};
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struct pmic;
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struct power_fg {
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int (*fg_battery_check) (struct pmic *p, struct pmic *bat);
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int (*fg_battery_update) (struct pmic *p, struct pmic *bat);
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};
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struct power_chrg {
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int (*chrg_type) (struct pmic *p);
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int (*chrg_bat_present) (struct pmic *p);
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int (*chrg_state) (struct pmic *p, int state, int current);
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};
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struct power_battery {
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struct battery *bat;
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int (*battery_init) (struct pmic *bat, struct pmic *p1,
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struct pmic *p2, struct pmic *p3);
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int (*battery_charge) (struct pmic *bat);
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/* Keep info about power devices involved with battery operation */
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struct pmic *chrg, *fg, *muic;
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};
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struct pmic {
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const char *name;
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unsigned char bus;
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unsigned char interface;
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unsigned char sensor_byte_order;
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unsigned int number_of_regs;
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union hw {
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struct p_i2c i2c;
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struct p_spi spi;
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} hw;
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void (*low_power_mode) (void);
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struct power_battery *pbat;
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struct power_chrg *chrg;
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struct power_fg *fg;
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struct pmic *parent;
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struct list_head list;
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};
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#endif /* CONFIG_POWER */
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#ifdef CONFIG_DM_PMIC
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/**
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* U-Boot PMIC Framework
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* =====================
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*
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* UCLASS_PMIC - This is designed to provide an I/O interface for PMIC devices.
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*
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* For the multi-function PMIC devices, this can be used as parent I/O device
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* for each IC's interface. Then, each child uses its parent for read/write.
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*
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* The driver model tree could look like this:
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*
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*_ root device
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* |_ BUS 0 device (e.g. I2C0) - UCLASS_I2C/SPI/...
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* | |_ PMIC device (READ/WRITE ops) - UCLASS_PMIC
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* | |_ REGULATOR device (ldo/buck/... ops) - UCLASS_REGULATOR
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* | |_ CHARGER device (charger ops) - UCLASS_CHARGER (in the future)
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* | |_ MUIC device (microUSB connector ops) - UCLASS_MUIC (in the future)
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* | |_ ...
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* |
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* |_ BUS 1 device (e.g. I2C1) - UCLASS_I2C/SPI/...
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* |_ PMIC device (READ/WRITE ops) - UCLASS_PMIC
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* |_ RTC device (rtc ops) - UCLASS_RTC (in the future)
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*
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* We can find two PMIC cases in boards design:
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* - single I/O interface
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* - multiple I/O interfaces
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* We bind a single PMIC device for each interface, to provide an I/O for
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* its child devices. And each child usually implements a different function,
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* controlled by the same interface.
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*
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* The binding should be done automatically. If device tree nodes/subnodes are
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* proper defined, then:
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*
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* |_ the ROOT driver will bind the device for I2C/SPI node:
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* |_ the I2C/SPI driver should bind a device for pmic node:
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* |_ the PMIC driver should bind devices for its childs:
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* |_ regulator (child)
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* |_ charger (child)
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* |_ other (child)
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*
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* The same for other device nodes, for multi-interface PMIC.
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*
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* Note:
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* Each PMIC interface driver should use a different compatible string.
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*
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* If a PMIC child device driver needs access the PMIC-specific registers,
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* it need know only the register address and the access can be done through
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* the parent pmic driver. Like in the example:
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*
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*_ root driver
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* |_ dev: bus I2C0 - UCLASS_I2C
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* | |_ dev: my_pmic (read/write) (is parent) - UCLASS_PMIC
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* | |_ dev: my_regulator (set value/etc..) (is child) - UCLASS_REGULATOR
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*
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* To ensure such device relationship, the pmic device driver should also bind
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* all its child devices, like in the example below. It can be done by calling
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* the 'pmic_bind_children()' - please refer to the function description, which
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* can be found in this header file. This function, should be called inside the
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* driver's bind() method.
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*
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* For the example driver, please refer the MAX77686 driver:
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* - 'drivers/power/pmic/max77686.c'
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*/
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/**
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* struct dm_pmic_ops - PMIC device I/O interface
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*
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* Should be implemented by UCLASS_PMIC device drivers. The standard
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* device operations provides the I/O interface for it's childs.
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*
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* @reg_count: device's register count
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* @read: read 'len' bytes at "reg" and store it into the 'buffer'
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* @write: write 'len' bytes from the 'buffer' to the register at 'reg' address
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*/
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struct dm_pmic_ops {
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int (*reg_count)(struct udevice *dev);
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int (*read)(struct udevice *dev, uint reg, uint8_t *buffer, int len);
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int (*write)(struct udevice *dev, uint reg, const uint8_t *buffer,
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int len);
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};
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/**
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* enum pmic_op_type - used for various pmic devices operation calls,
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* for reduce a number of lines with the same code for read/write or get/set.
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*
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* @PMIC_OP_GET - get operation
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* @PMIC_OP_SET - set operation
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*/
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enum pmic_op_type {
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PMIC_OP_GET,
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PMIC_OP_SET,
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};
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/**
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* struct pmic_child_info - basic device's child info for bind child nodes with
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* the driver by the node name prefix and driver name. This is a helper struct
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* for function: pmic_bind_children().
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*
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* @prefix - child node name prefix (or its name if is unique or single)
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* @driver - driver name for the sub-node with prefix
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*/
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struct pmic_child_info {
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const char *prefix;
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const char *driver;
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};
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/* drivers/power/pmic-uclass.c */
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/**
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* pmic_bind_children() - bind drivers for given parent pmic, using child info
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* found in 'child_info' array.
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*
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* @pmic - pmic device - the parent of found child's
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* @child_info - N-childs info array
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* @return a positive number of childs, or 0 if no child found (error)
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*
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* Note: For N-childs the child_info array should have N+1 entries and the last
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* entry prefix should be NULL - the same as for drivers compatible.
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*
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* For example, a single prefix info (N=1):
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* static const struct pmic_child_info bind_info[] = {
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* { .prefix = "ldo", .driver = "ldo_driver" },
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* { },
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* };
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*
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* This function is useful for regulator sub-nodes:
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* my_regulator@0xa {
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* reg = <0xa>;
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* (pmic - bind automatically by compatible)
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* compatible = "my_pmic";
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* ...
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* (pmic's childs - bind by pmic_bind_children())
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* (nodes prefix: "ldo", driver: "my_regulator_ldo")
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* ldo1 { ... };
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* ldo2 { ... };
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*
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* (nodes prefix: "buck", driver: "my_regulator_buck")
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* buck1 { ... };
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* buck2 { ... };
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* };
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*/
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int pmic_bind_children(struct udevice *pmic, ofnode parent,
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const struct pmic_child_info *child_info);
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/**
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* pmic_get: get the pmic device using its name
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*
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* @name - device name
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* @devp - returned pointer to the pmic device
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* @return 0 on success or negative value of errno.
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*
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* The returned devp device can be used with pmic_read/write calls
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*/
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int pmic_get(const char *name, struct udevice **devp);
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/**
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* pmic_reg_count: get the pmic register count
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*
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* The required pmic device can be obtained by 'pmic_get()'
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*
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* @dev - pointer to the UCLASS_PMIC device
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* @return register count value on success or negative value of errno.
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*/
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int pmic_reg_count(struct udevice *dev);
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/**
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* pmic_read/write: read/write to the UCLASS_PMIC device
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*
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* The required pmic device can be obtained by 'pmic_get()'
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*
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* @pmic - pointer to the UCLASS_PMIC device
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* @reg - device register offset
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* @buffer - pointer to read/write buffer
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* @len - byte count for read/write
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* @return 0 on success or negative value of errno.
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*/
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int pmic_read(struct udevice *dev, uint reg, uint8_t *buffer, int len);
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int pmic_write(struct udevice *dev, uint reg, const uint8_t *buffer, int len);
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/**
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* pmic_reg_read() - read a PMIC register value
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*
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* @dev: PMIC device to read
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* @reg: Register to read
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* @return value read on success or negative value of errno.
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*/
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int pmic_reg_read(struct udevice *dev, uint reg);
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/**
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* pmic_reg_write() - write a PMIC register value
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*
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* @dev: PMIC device to write
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* @reg: Register to write
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* @value: Value to write
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* @return 0 on success or negative value of errno.
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*/
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int pmic_reg_write(struct udevice *dev, uint reg, uint value);
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/**
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* pmic_clrsetbits() - clear and set bits in a PMIC register
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*
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* This reads a register, optionally clears some bits, optionally sets some
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* bits, then writes the register.
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*
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* @dev: PMIC device to update
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* @reg: Register to update
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* @clr: Bit mask to clear (set those bits that you want cleared)
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* @set: Bit mask to set (set those bits that you want set)
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* @return 0 on success or negative value of errno.
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*/
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int pmic_clrsetbits(struct udevice *dev, uint reg, uint clr, uint set);
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/*
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* This structure holds the private data for PMIC uclass
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* For now we store information about the number of bytes
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* being sent at once to the device.
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*/
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struct uc_pmic_priv {
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uint trans_len;
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};
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#endif /* CONFIG_DM_PMIC */
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#ifdef CONFIG_POWER
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int pmic_init(unsigned char bus);
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int power_init_board(void);
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int pmic_dialog_init(unsigned char bus);
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int check_reg(struct pmic *p, u32 reg);
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struct pmic *pmic_alloc(void);
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struct pmic *pmic_get(const char *s);
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int pmic_probe(struct pmic *p);
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int pmic_reg_read(struct pmic *p, u32 reg, u32 *val);
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int pmic_reg_write(struct pmic *p, u32 reg, u32 val);
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int pmic_set_output(struct pmic *p, u32 reg, int ldo, int on);
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#endif
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#define pmic_i2c_addr (p->hw.i2c.addr)
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#define pmic_i2c_tx_num (p->hw.i2c.tx_num)
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#define pmic_spi_bitlen (p->hw.spi.bitlen)
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#define pmic_spi_flags (p->hw.spi.flags)
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#endif /* __CORE_PMIC_H_ */
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