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b2b135d980
Map the Global Control Registers (GCRs) provided by the MIPS Coherence Manager (CM) in preparation for using some of them in later patches. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
20 lines
423 B
C
20 lines
423 B
C
/*
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* MIPS Coherence Manager (CM) Register Definitions
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*
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* Copyright (c) 2016 Imagination Technologies Ltd.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __MIPS_ASM_CM_H__
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#define __MIPS_ASM_CM_H__
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/* Global Control Register (GCR) offsets */
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#define GCR_BASE 0x0008
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#define GCR_BASE_UPPER 0x000c
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#define GCR_REV 0x0030
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/* GCR_REV CM versions */
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#define GCR_REV_CM3 0x0800
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#endif /* __MIPS_ASM_CM_H__ */
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