Marek Vasut b275c9aba6 ARM: cache: Fix incorrect bitwise operation ... The loop implemented in the code is supposed to check whether the PL310 operation register has any bit from the mask set. Currently, the code checks whether the PL310 operation register has any bit set AND whether the mask is non-zero, which is incorrect. Fix the conditional. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dalon Westergreen <dwesterg@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Tom Rini <trini@konsulko.com> Fixes: 93bc21930a ("armv7: add PL310 support to u-boot")		2019-02-25 16:07:36 +01:00
..
arc	ARC: cache: define CONFIG_SYS_CACHELINE_SIZE as ARCH_DMA_MINALIGN	2019-01-25 08:41:09 +03:00
arm	ARM: cache: Fix incorrect bitwise operation	2019-02-25 16:07:36 +01:00
m68k	m68k: ColdFire mcf5441x, add eSDHC support	2018-09-16 00:01:13 +02:00
microblaze	arch: types.h: factor out fixed width typedefs to int-ll64.h	2018-09-10 20:48:16 -04:00
mips	dt: bcm6838: add watchdog	2019-02-09 07:50:50 -05:00
nds32	nds32: dts: Fix mmc node compatible string	2019-01-22 17:36:20 +08:00
nios2	.gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore	2018-06-18 14:43:12 -04:00
powerpc	linker: Modify linker scripts to be more generic	2019-01-26 22:55:53 -05:00
riscv	riscv: qemu: define standalone load address	2019-01-15 09:36:31 +08:00
sandbox	sandbox: sound: Silence sound for testing	2019-02-20 15:27:09 +08:00
sh	sh: bitops: add hweight*() macros	2019-02-07 15:33:21 +05:30
x86	x86: Add sound support for samus	2019-02-20 15:27:11 +08:00
xtensa	xtensa: use asm-generic/atomic.h	2018-09-25 21:49:18 -04:00
.gitignore
Kconfig	x86: sandbox: pch: Add a CONFIG option for PCH	2019-02-20 15:25:30 +08:00