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https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
97 lines
2.6 KiB
C
97 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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* Author: Priyanka Jain <Priyanka.Jain@freescale.com>
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*/
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#include <common.h>
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#include <command.h>
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#include <linux/ctype.h>
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#include <asm/io.h>
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#include <stdio_dev.h>
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#include <video_fb.h>
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#include <fsl_diu_fb.h>
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#include "../common/qixis.h"
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#include "../common/diu_ch7301.h"
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#include "t1040qds.h"
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#include "t1040qds_qixis.h"
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/*
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* DIU Area Descriptor
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*
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* Note that we need to byte-swap the value before it's written to the AD
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* register. So even though the registers don't look like they're in the same
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* bit positions as they are on the MPC8610, the same value is written to the
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* AD register on the MPC8610 and on the P1022.
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*/
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#define AD_BYTE_F 0x10000000
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#define AD_ALPHA_C_SHIFT 25
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#define AD_BLUE_C_SHIFT 23
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#define AD_GREEN_C_SHIFT 21
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#define AD_RED_C_SHIFT 19
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#define AD_PIXEL_S_SHIFT 16
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#define AD_COMP_3_SHIFT 12
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#define AD_COMP_2_SHIFT 8
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#define AD_COMP_1_SHIFT 4
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#define AD_COMP_0_SHIFT 0
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void diu_set_pixel_clock(unsigned int pixclock)
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{
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unsigned long speed_ccb, temp;
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u32 pixval;
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int ret = 0;
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speed_ccb = get_bus_freq(0);
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temp = 1000000000 / pixclock;
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temp *= 1000;
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pixval = speed_ccb / temp;
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/* Program HDMI encoder */
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/* Switch channel to DIU */
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select_i2c_ch_pca9547(I2C_MUX_CH_DIU);
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/* Set dispaly encoder */
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ret = diu_set_dvi_encoder(temp);
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if (ret) {
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puts("Failed to set DVI encoder\n");
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return;
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}
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/* Switch channel to default */
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select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
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/* Program pixel clock */
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out_be32((unsigned *)CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR,
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((pixval << PXCK_BITS_START) & PXCK_MASK));
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/* enable clock*/
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out_be32((unsigned *)CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR, PXCKEN_MASK |
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((pixval << PXCK_BITS_START) & PXCK_MASK));
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}
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int platform_diu_init(unsigned int xres, unsigned int yres, const char *port)
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{
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u32 pixel_format;
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u8 sw;
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/*Route I2C4 to DIU system as HSYNC/VSYNC*/
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sw = QIXIS_READ(brdcfg[5]);
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QIXIS_WRITE(brdcfg[5],
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((sw & ~(BRDCFG5_IMX_MASK)) | (BRDCFG5_IMX_DIU)));
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/*Configure Display ouput port as HDMI*/
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sw = QIXIS_READ(brdcfg[15]);
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QIXIS_WRITE(brdcfg[15],
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((sw & ~(BRDCFG15_LCDPD_MASK | BRDCFG15_DIUSEL_MASK))
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| (BRDCFG15_LCDPD_ENABLED | BRDCFG15_DIUSEL_HDMI)));
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pixel_format = cpu_to_le32(AD_BYTE_F | (3 << AD_ALPHA_C_SHIFT) |
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(0 << AD_BLUE_C_SHIFT) | (1 << AD_GREEN_C_SHIFT) |
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(2 << AD_RED_C_SHIFT) | (8 << AD_COMP_3_SHIFT) |
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(8 << AD_COMP_2_SHIFT) | (8 << AD_COMP_1_SHIFT) |
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(8 << AD_COMP_0_SHIFT) | (3 << AD_PIXEL_S_SHIFT));
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printf("DIU: Switching to monitor @ %ux%u\n", xres, yres);
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return fsl_diu_init(xres, yres, pixel_format, 0);
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}
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