mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-10 20:23:54 +09:00
bea2674ccd
This implements a useful bootcmd for Tegra. The boot order is: * If USB enabled, USB storage * Internal MMC (SD card or eMMC) * If networking is enabled, BOOTP/TFTP When booting from USB or MMC, the boot script is assumed to be in partition 1 (although this may be overridden via the rootpart variable), both ext2 and FAT filesystems are supported, the boot script may exist in either / or /boot, and the boot script may be named boot.scr.uimg or boot.scr. When booting over the network, it is assumed that boot.scr.uimg exists on the TFTP server. There is less flexibility here since those setting up network booting are expected to need less hand-holding. In all cases, it is expected that the initial file loaded is a U-Boot image containing a script that will load the kernel, load any required initrd, load any required DTB, and finally bootm the kernel. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
196 lines
5.8 KiB
C
196 lines
5.8 KiB
C
/*
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* (C) Copyright 2010,2011
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* NVIDIA Corporation <www.nvidia.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __TEGRA2_COMMON_H
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#define __TEGRA2_COMMON_H
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#include <asm/sizes.h>
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/*
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* QUOTE(m) will evaluate to a string version of the value of the macro m
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* passed in. The extra level of indirection here is to first evaluate the
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* macro m before applying the quoting operator.
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*/
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#define QUOTE_(m) #m
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#define QUOTE(m) QUOTE_(m)
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
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#define CONFIG_TEGRA2 /* in a NVidia Tegra2 core */
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#define CONFIG_MACH_TEGRA_GENERIC /* which is a Tegra generic machine */
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#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
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#define CONFIG_SYS_CACHELINE_SIZE 32
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#define CONFIG_ARCH_CPU_INIT /* Fire up the A9 core */
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#include <asm/arch/tegra2.h> /* get chip and board defs */
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/*
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* Display CPU and Board information
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*/
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_OF_LIBFDT /* enable passing of devicetree */
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#ifdef CONFIG_TEGRA2_LP0
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#define TEGRA_LP0_ADDR 0x1C406000
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#define TEGRA_LP0_SIZE 0x2000
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#define TEGRA_LP0_VEC \
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"lp0_vec=" QUOTE(TEGRA_LP0_SIZE) "@" QUOTE(TEGRA_LP0_ADDR) " "
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#else
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#define TEGRA_LP0_VEC
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#endif
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/* Environment */
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#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
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/*
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* PllX Configuration
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*/
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#define CONFIG_SYS_CPU_OSC_FREQUENCY 1000000 /* Set CPU clock to 1GHz */
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/*
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* NS16550 Configuration
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*/
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#define V_NS16550_CLK 216000000 /* 216MHz (pllp_out0) */
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
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/*
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* select serial console configuration
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*/
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#define CONFIG_CONS_INDEX 1
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
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115200}
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/*
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* This parameter affects a TXFILLTUNING field that controls how much data is
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* sent to the latency fifo before it is sent to the wire. Without this
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* parameter, the default (2) causes occasional Data Buffer Errors in OUT
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* packets depending on the buffer address and size.
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*/
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#define CONFIG_USB_EHCI_TXFIFO_THRESH 10
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#define CONFIG_EHCI_IS_TDI
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#define CONFIG_EHCI_DCACHE
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/* Total I2C ports on Tegra2 */
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#define TEGRA_I2C_NUM_CONTROLLERS 4
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/* include default commands */
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#include <config_cmd_default.h>
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/* remove unused commands */
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#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
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#undef CONFIG_CMD_FPGA /* FPGA configuration support */
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_IMLS
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#undef CONFIG_CMD_NFS /* NFS support */
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#undef CONFIG_CMD_NET /* network support */
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/* turn on command-line edit/hist/auto */
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_COMMAND_HISTORY
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_NO_FLASH
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/* Environment information, boards can override if required */
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#define CONFIG_CONSOLE_MUX
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV
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#define TEGRA2_DEVICE_SETTINGS "stdin=serial\0" \
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"stdout=serial\0" \
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"stderr=serial\0"
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#define CONFIG_LOADADDR 0x408000 /* def. location for kernel */
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#define CONFIG_BOOTDELAY 2 /* -1 to disable auto boot */
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#define CONFIG_SYS_PROMPT V_PROMPT
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/*
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* Increasing the size of the IO buffer as default nfsargs size is more
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* than 256 and so it is not possible to edit it
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*/
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#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
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#define CONFIG_SYS_MEMTEST_START (TEGRA2_SDRC_CS0 + 0x600000)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
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#define CONFIG_SYS_LOAD_ADDR (0xA00800) /* default */
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#define CONFIG_SYS_HZ 1000
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKBASE 0x2800000 /* 40MB */
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#define CONFIG_STACKSIZE 0x20000 /* 128K regular stack*/
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 TEGRA2_SDRC_CS0
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#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
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#define CONFIG_SYS_TEXT_BASE 0x00108000
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
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#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_TEGRA2_GPIO
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#define CONFIG_CMD_GPIO
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#endif /* __TEGRA2_COMMON_H */
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