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![Philipp Tomsich](/assets/img/avatar_default.png)
The RK3399 SPL has two cases that may end in a hard-stop: if either the pinctrl can not be initialised or if the DRAM fails to initialise. Both have previously not triggered an error message unless DEBUG was defined (i.e. both used debug() to print the error). This converts both error messages to be printed using pr_err() to ensure that some output points to the cause of the hard-stop. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
225 lines
5.6 KiB
C
225 lines
5.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2016 Rockchip Electronics Co., Ltd
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
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*/
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#include <common.h>
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#include <asm/arch/bootrom.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/grf_rk3399.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/periph.h>
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#include <asm/io.h>
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#include <debug_uart.h>
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#include <dm.h>
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#include <dm/pinctrl.h>
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#include <ram.h>
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#include <spl.h>
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#include <syscon.h>
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void board_return_to_bootrom(void)
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{
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back_to_bootrom(BROM_BOOT_NEXTSTAGE);
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}
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static const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
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[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
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[BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000",
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[BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
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};
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const char *board_spl_was_booted_from(void)
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{
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u32 bootdevice_brom_id = readl(RK3399_BROM_BOOTSOURCE_ID_ADDR);
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const char *bootdevice_ofpath = NULL;
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if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
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bootdevice_ofpath = boot_devices[bootdevice_brom_id];
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if (bootdevice_ofpath)
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debug("%s: brom_bootdevice_id %x maps to '%s'\n",
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__func__, bootdevice_brom_id, bootdevice_ofpath);
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else
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debug("%s: failed to resolve brom_bootdevice_id %x\n",
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__func__, bootdevice_brom_id);
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return bootdevice_ofpath;
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}
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u32 spl_boot_device(void)
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{
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u32 boot_device = BOOT_DEVICE_MMC1;
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if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
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return BOOT_DEVICE_BOOTROM;
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return boot_device;
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}
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const char *spl_decode_boot_device(u32 boot_device)
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{
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int i;
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static const struct {
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u32 boot_device;
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const char *ofpath;
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} spl_boot_devices_tbl[] = {
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{ BOOT_DEVICE_MMC1, "/dwmmc@fe320000" },
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{ BOOT_DEVICE_MMC2, "/sdhci@fe330000" },
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{ BOOT_DEVICE_SPI, "/spi@ff1d0000" },
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};
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for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
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if (spl_boot_devices_tbl[i].boot_device == boot_device)
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return spl_boot_devices_tbl[i].ofpath;
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return NULL;
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}
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void spl_perform_fixups(struct spl_image_info *spl_image)
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{
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void *blob = spl_image->fdt_addr;
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const char *boot_ofpath;
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int chosen;
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/*
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* Inject the ofpath of the device the full U-Boot (or Linux in
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* Falcon-mode) was booted from into the FDT, if a FDT has been
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* loaded at the same time.
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*/
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if (!blob)
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return;
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boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
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if (!boot_ofpath) {
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pr_err("%s: could not map boot_device to ofpath\n", __func__);
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return;
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}
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chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
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if (chosen < 0) {
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pr_err("%s: could not find/create '/chosen'\n", __func__);
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return;
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}
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fdt_setprop_string(blob, chosen,
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"u-boot,spl-boot-device", boot_ofpath);
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}
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#define TIMER_CHN10_BASE 0xff8680a0
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#define TIMER_END_COUNT_L 0x00
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#define TIMER_END_COUNT_H 0x04
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#define TIMER_INIT_COUNT_L 0x10
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#define TIMER_INIT_COUNT_H 0x14
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#define TIMER_CONTROL_REG 0x1c
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#define TIMER_EN 0x1
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#define TIMER_FMODE (0 << 1)
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#define TIMER_RMODE (1 << 1)
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void secure_timer_init(void)
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{
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writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_L);
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writel(0xffffffff, TIMER_CHN10_BASE + TIMER_END_COUNT_H);
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writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_L);
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writel(0, TIMER_CHN10_BASE + TIMER_INIT_COUNT_H);
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writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
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}
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void board_debug_uart_init(void)
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{
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#define GRF_BASE 0xff770000
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struct rk3399_grf_regs * const grf = (void *)GRF_BASE;
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#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
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/* Enable early UART0 on the RK3399 */
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rk_clrsetreg(&grf->gpio2c_iomux,
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GRF_GPIO2C0_SEL_MASK,
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GRF_UART0BT_SIN << GRF_GPIO2C0_SEL_SHIFT);
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rk_clrsetreg(&grf->gpio2c_iomux,
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GRF_GPIO2C1_SEL_MASK,
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GRF_UART0BT_SOUT << GRF_GPIO2C1_SEL_SHIFT);
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#else
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/* Enable early UART2 channel C on the RK3399 */
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rk_clrsetreg(&grf->gpio4c_iomux,
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GRF_GPIO4C3_SEL_MASK,
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GRF_UART2DGBC_SIN << GRF_GPIO4C3_SEL_SHIFT);
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rk_clrsetreg(&grf->gpio4c_iomux,
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GRF_GPIO4C4_SEL_MASK,
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GRF_UART2DBGC_SOUT << GRF_GPIO4C4_SEL_SHIFT);
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/* Set channel C as UART2 input */
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rk_clrsetreg(&grf->soc_con7,
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GRF_UART_DBG_SEL_MASK,
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GRF_UART_DBG_SEL_C << GRF_UART_DBG_SEL_SHIFT);
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#endif
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}
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void board_init_f(ulong dummy)
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{
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struct udevice *pinctrl;
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struct udevice *dev;
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struct rk3399_pmusgrf_regs *sgrf;
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struct rk3399_grf_regs *grf;
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int ret;
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#define EARLY_UART
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#ifdef EARLY_UART
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/*
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* Debug UART can be used from here if required:
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*
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* debug_uart_init();
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* printch('a');
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* printhex8(0x1234);
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* printascii("string");
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*/
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debug_uart_init();
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printascii("U-Boot SPL board init\n");
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#endif
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ret = spl_early_init();
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if (ret) {
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debug("spl_early_init() failed: %d\n", ret);
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hang();
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}
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/*
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* Disable DDR and SRAM security regions.
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*
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* As we are entered from the BootROM, the region from
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* 0x0 through 0xfffff (i.e. the first MB of memory) will
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* be protected. This will cause issues with the DW_MMC
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* driver, which tries to DMA from/to the stack (likely)
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* located in this range.
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*/
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sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF);
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rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0);
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rk_clrreg(&sgrf->slv_secure_con4, 0x2000);
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/* eMMC clock generator: disable the clock multipilier */
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grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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rk_clrreg(&grf->emmccore_con[11], 0x0ff);
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secure_timer_init();
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ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
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if (ret) {
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pr_err("Pinctrl init failed: %d\n", ret);
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return;
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}
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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pr_err("DRAM init failed: %d\n", ret);
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return;
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}
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}
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#ifdef CONFIG_SPL_LOAD_FIT
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int board_fit_config_name_match(const char *name)
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{
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/* Just empty function now - can't decide what to choose */
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debug("%s: %s\n", __func__, name);
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return 0;
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}
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#endif
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