mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-18 10:44:13 +09:00
b1509e3a4a
identify_nand_chip hangs forever in loop when NAND is not present. As IGEPv2 comes either with NAND or OneNAND flash, add reset timeout to let function fail gracefully allowing caller to know NAND is not present. On NAND equipped board, reset succeeds on first read, so 1000 loops seems to be safe timeout. Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
78 lines
1.7 KiB
C
78 lines
1.7 KiB
C
/*
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* (C) Copyright 2004-2008
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* Texas Instruments, <www.ti.com>
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* Richard Woodruff <r-woodruff2@ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SYS_PROTO_H_
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#define _SYS_PROTO_H_
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#include <linux/mtd/omap_gpmc.h>
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#include <asm/omap_common.h>
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typedef struct {
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u32 mtype;
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char *board_string;
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char *nand_string;
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} omap3_sysinfo;
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struct emu_hal_params {
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u32 num_params;
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u32 param1;
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};
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/* Board SDRC timing values */
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struct board_sdrc_timings {
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u32 sharing;
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u32 mcfg;
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u32 ctrla;
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u32 ctrlb;
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u32 rfr_ctrl;
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u32 mr;
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};
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void prcm_init(void);
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void per_clocks_enable(void);
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void ehci_clocks_enable(void);
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void memif_init(void);
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void sdrc_init(void);
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void do_sdrc_init(u32, u32);
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void get_board_mem_timings(struct board_sdrc_timings *timings);
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int identify_nand_chip(int *mfr, int *id);
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void emif4_init(void);
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void gpmc_init(void);
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void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
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u32 size);
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void watchdog_init(void);
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void set_muxconf_regs(void);
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u32 get_cpu_family(void);
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u32 get_cpu_rev(void);
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u32 get_sku_id(void);
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u32 is_gpmc_muxed(void);
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u32 get_gpmc0_type(void);
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u32 get_gpmc0_width(void);
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u32 is_running_in_sdram(void);
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u32 is_running_in_sram(void);
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u32 is_running_in_flash(void);
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u32 get_device_type(void);
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void secureworld_exit(void);
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void try_unlock_memory(void);
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u32 get_boot_type(void);
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void invalidate_dcache(u32);
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u32 wait_on_value(u32, u32, void *, u32);
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void cancel_out(u32 *num, u32 *den, u32 den_limit);
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void sdelay(unsigned long);
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void make_cs1_contiguous(void);
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void omap_nand_switch_ecc(uint32_t, uint32_t);
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void power_init_r(void);
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void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
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void omap3_set_aux_cr_secure(u32 acr);
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u32 warm_reset(void);
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void save_omap_boot_params(void);
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#endif
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