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70a2df36fe
In preparation for converting to DM_ETH and moving the FEC symbols to Kconfig we need to move the FEC definitions to mx6sabreauto.h and mx6sabresd.h to avoid build breakage during the conversion. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
75 lines
2.0 KiB
C
75 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the Freescale i.MX6Q SabreSD board.
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*/
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#ifndef __MX6SABRESD_CONFIG_H
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#define __MX6SABRESD_CONFIG_H
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#ifdef CONFIG_SPL
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#include "imx6_spl.h"
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#endif
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#define CONFIG_MACH_TYPE 3980
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#define CONFIG_MXC_UART_BASE UART1_BASE
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#define CONSOLE_DEV "ttymxc0"
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#include "mx6sabre_common.h"
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/* Falcon Mode */
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#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
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#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
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#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
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/* Falcon Mode - MMC support: args@1MB kernel@2MB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
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#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
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#define CONFIG_SYS_FSL_USDHC_NUM 3
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#if defined(CONFIG_ENV_IS_IN_MMC)
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#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
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#endif
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#ifdef CONFIG_CMD_PCI
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#define CONFIG_PCI_SCAN_SHOW
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#define CONFIG_PCIE_IMX
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#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
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#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
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#endif
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/* I2C Configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* PMIC */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_PFUZE100
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#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
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/* USB Configs */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
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#endif
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#define CONFIG_FEC_MXC
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 1
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#define CONFIG_PHY_ATHEROS
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#endif /* __MX6SABRESD_CONFIG_H */
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