mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
38d6b7ebda
This uses up space in the SPL binary but it always starts as zero. Also some boards cannot support data in TPL (e.g. Intel Apollo Lake). Use malloc() to allocate this structure instead, by moving the init a little later, after malloc() is inited. Make this function optional since it pulls in malloc(). This reduces the TPL binary size on coral by about 64 bytes Signed-off-by: Simon Glass <sjg@chromium.org>
151 lines
3.4 KiB
C
151 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2014-2015 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <clock_legacy.h>
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#include <cpu_func.h>
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#include <env.h>
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#include <image.h>
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#include <init.h>
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#include <log.h>
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#include <spl.h>
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#include <asm/cache.h>
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#include <asm/io.h>
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#include <fsl_ifc.h>
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#include <i2c.h>
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#include <fsl_csu.h>
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#include <asm/arch/fdt.h>
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#include <asm/arch/ppa.h>
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#include <asm/arch/soc.h>
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DECLARE_GLOBAL_DATA_PTR;
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u32 spl_boot_device(void)
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{
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#ifdef CONFIG_SPL_MMC_SUPPORT
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return BOOT_DEVICE_MMC1;
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#endif
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#ifdef CONFIG_SPL_NAND_SUPPORT
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return BOOT_DEVICE_NAND;
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#endif
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#ifdef CONFIG_QSPI_BOOT
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return BOOT_DEVICE_NOR;
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#endif
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return 0;
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}
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#ifdef CONFIG_SPL_BUILD
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/* Define board data structure */
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static struct bd_info bdata __attribute__ ((section(".data")));
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void spl_board_init(void)
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{
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#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_LSCH2)
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/*
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* In case of Secure Boot, the IBR configures the SMMU
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* to allow only Secure transactions.
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* SMMU must be reset in bypass mode.
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* Set the ClientPD bit and Clear the USFCFG Bit
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*/
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u32 val;
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val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
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out_le32(SMMU_SCR0, val);
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val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
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out_le32(SMMU_NSCR0, val);
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#endif
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#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
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enable_layerscape_ns_access();
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#endif
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#ifdef CONFIG_SPL_FSL_LS_PPA
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ppa_init();
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#endif
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}
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void board_init_f(ulong dummy)
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{
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icache_enable();
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/* Clear global data */
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memset((void *)gd, 0, sizeof(gd_t));
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board_early_init_f();
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timer_init();
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#ifdef CONFIG_ARCH_LS2080A
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env_init();
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#endif
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get_clocks();
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preloader_console_init();
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gd->bd = &bdata;
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#ifdef CONFIG_SYS_I2C
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#ifdef CONFIG_SPL_I2C_SUPPORT
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i2c_init_all();
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#endif
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#endif
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#ifdef CONFIG_VID
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init_func_vid();
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#endif
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dram_init();
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#ifdef CONFIG_SPL_FSL_LS_PPA
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#ifndef CONFIG_SYS_MEM_RESERVE_SECURE
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#error Need secure RAM for PPA
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#endif
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/*
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* Secure memory location is determined in dram_init_banksize().
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* gd->ram_size is deducted by the size of secure ram.
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*/
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dram_init_banksize();
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/*
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* After dram_init_bank_size(), we know U-Boot only uses the first
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* memory bank regardless how big the memory is.
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*/
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gd->ram_top = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
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/*
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* If PPA is loaded, U-Boot will resume running at EL2.
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* Cache and MMU will be enabled. Need a place for TLB.
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* U-Boot will be relocated to the end of available memory
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* in first bank. At this point, we cannot know how much
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* memory U-Boot uses. Put TLB table lower by SPL_TLB_SETBACK
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* to avoid overlapping. As soon as the RAM version U-Boot sets
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* up new MMU, this space is no longer needed.
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*/
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gd->ram_top -= SPL_TLB_SETBACK;
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gd->arch.tlb_size = PGTABLE_SIZE;
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gd->arch.tlb_addr = (gd->ram_top - gd->arch.tlb_size) & ~(0x10000 - 1);
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gd->arch.tlb_allocated = gd->arch.tlb_addr;
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#endif /* CONFIG_SPL_FSL_LS_PPA */
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#if defined(CONFIG_QSPI_AHB_INIT) && defined(CONFIG_QSPI_BOOT)
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qspi_ahb_init();
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#endif
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}
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#ifdef CONFIG_SPL_OS_BOOT
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/*
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* Return
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* 0 if booting into OS is selected
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* 1 if booting into U-Boot is selected
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*/
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int spl_start_uboot(void)
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{
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env_init();
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if (env_get_yesno("boot_os") != 0)
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return 0;
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return 1;
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}
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#endif /* CONFIG_SPL_OS_BOOT */
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#ifdef CONFIG_SPL_LOAD_FIT
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__weak int board_fit_config_name_match(const char *name)
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{
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/* Just empty function now - can't decide what to choose */
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debug("%s: %s\n", __func__, name);
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return 0;
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}
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#endif
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#endif /* CONFIG_SPL_BUILD */
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