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https://github.com/brain-hackers/u-boot-brain
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![Thierry Reding](/assets/img/avatar_default.png)
The PCIe bus on Cardhu is routed to the dock connector. An ethernet NIC is available on the dock over the PCIe bus. Enable the PCIe controller and the network device driver so that the device can boot over the network. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
138 lines
2.6 KiB
C
138 lines
2.6 KiB
C
/*
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* (C) Copyright 2010-2013
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* NVIDIA Corporation <www.nvidia.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/gp_padctrl.h>
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#include <asm/arch/gpio.h>
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#include <asm/gpio.h>
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#include "pinmux-config-cardhu.h"
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#include <i2c.h>
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#include <netdev.h>
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#define PMU_I2C_ADDRESS 0x2D
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#define MAX_I2C_RETRY 3
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/*
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* Routine: pinmux_init
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* Description: Do individual peripheral pinmux configs
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*/
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void pinmux_init(void)
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{
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pinmux_config_pingrp_table(tegra3_pinmux_common,
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ARRAY_SIZE(tegra3_pinmux_common));
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pinmux_config_pingrp_table(unused_pins_lowpower,
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ARRAY_SIZE(unused_pins_lowpower));
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/* Initialize any non-default pad configs (APB_MISC_GP regs) */
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pinmux_config_drvgrp_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl));
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}
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#if defined(CONFIG_TEGRA_MMC)
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/*
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* Do I2C/PMU writes to bring up SD card bus power
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*
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*/
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void board_sdmmc_voltage_init(void)
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{
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struct udevice *dev;
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uchar reg, data_buffer[1];
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int ret;
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int i;
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ret = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, &dev);
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if (ret) {
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debug("%s: Cannot find PMIC I2C chip\n", __func__);
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return;
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}
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/* TPS659110: LDO5_REG = 3.3v, ACTIVE to SDMMC1 */
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data_buffer[0] = 0x65;
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reg = 0x32;
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for (i = 0; i < MAX_I2C_RETRY; ++i) {
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if (i2c_write(dev, reg, data_buffer, 1))
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udelay(100);
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}
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/* TPS659110: GPIO7_REG = PDEN, output a 1 to EN_3V3_SYS */
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data_buffer[0] = 0x09;
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reg = 0x67;
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for (i = 0; i < MAX_I2C_RETRY; ++i) {
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if (i2c_write(dev, reg, data_buffer, 1))
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udelay(100);
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}
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}
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/*
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* Routine: pin_mux_mmc
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* Description: setup the MMC muxes, power rails, etc.
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*/
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void pin_mux_mmc(void)
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{
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/*
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* NOTE: We don't do mmc-specific pin muxes here.
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* They were done globally in pinmux_init().
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*/
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/* Bring up the SDIO1 power rail */
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board_sdmmc_voltage_init();
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}
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#endif /* MMC */
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#ifdef CONFIG_PCI_TEGRA
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int tegra_pcie_board_init(void)
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{
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struct udevice *dev;
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u8 addr, data[1];
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int err;
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err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, &dev);
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if (err) {
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debug("failed to find PMU bus\n");
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return err;
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}
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/* TPS659110: LDO1_REG = 1.05V, ACTIVE */
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data[0] = 0x15;
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addr = 0x30;
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err = i2c_write(dev, addr, data, 1);
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if (err) {
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debug("failed to set VDD supply\n");
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return err;
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}
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/* GPIO: PEX = 3.3V */
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err = gpio_request(GPIO_PL7, "PEX");
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if (err < 0)
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return err;
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gpio_direction_output(GPIO_PL7, 1);
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/* TPS659110: LDO2_REG = 1.05V, ACTIVE */
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data[0] = 0x15;
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addr = 0x31;
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err = i2c_write(dev, addr, data, 1);
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if (err) {
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debug("failed to set AVDD supply\n");
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return err;
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}
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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return pci_eth_init(bis);
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}
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#endif /* PCI */
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