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![]() Add support for lx2160a SoC -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEorkTmaQ1QAtDiYw67UVZlNoLnbQFAlwOzFoACgkQ7UVZlNoL nbQUdQ//SRRBfjUe8RYTbojvTGQav0GTxnMkz4GFSrqu0nvGMW2YSlheOMqq72sg rK5mQqDvdkItCn+G8AZ5NV2ijkQ7NQWCfqL3EtApzTpv6qjfgv7xvopz8q4NZvzB Wp+4cFf9YQjNwhJ7kLvWHB7SBiz9AfMYRAj9cscH9xsGL3HxPj62WDfwyK/QXana KIxRKQ26/1AdOZy272yv70vlFj4IwForxV3ACimsWRuYcb8yre3pE0tD7XpMCSNv 9GOfL7r4LS7U0+QnJoVeYLMhttRvOGJNUYtO2+ImO5NC3u9v8ehYEQ3FjGmM69CB vuPDQBDQc+Ap+Iu3k18PYSstp+mc9fbe9SQdlx6ARAecQqWTN4EOhf8s3m2bQq3S B58I0Zvowcdm8V2JKdXw94UqZX862U8PWH0BmcuX+4k+kRDwwU4XQY2nLp+Htz1w 2q6vEdKGj7YUOaomx9fmKRL+9BFGoD+M9mTiHOwzqwxy6Pa9VkruSvMErM7p2l/z xI/Q+xPJhyk5TXgZRsz4Nat59WpifWruibKEd4PArQ446heHWmzLWjw/MWiFyd/H agCdpDZVJ8R7h1Krs+Ez8XjR1Qcg0gs+CdNBuvqxzOpMQGGonXA1nwi8YfHykhII urfoC8pew1yxiLGw7J2JSX808HV/09WCSEsrOOhE3T78rXTDlS4= =aT7d -----END PGP SIGNATURE----- Merge tag 'fsl-qoriq-for-v2019.01-rc2' of git://git.denx.de/u-boot-fsl-qoriq Add TFA boot flow for some Layerscape platforms Add support for lx2160a SoC [trini: Add a bunch of missing MAINTAINERS entries] Signed-off-by: Tom Rini <trini@konsulko.com> |
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.. | ||
eth.c | ||
Kconfig | ||
ls1012afrdm.c | ||
MAINTAINERS | ||
Makefile | ||
README |
Overview -------- QorIQ LS1012A FREEDOM (LS1012AFRDM) is a high-performance development platform, with a complete debugging environment. The LS1012AFRDM board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. LS1012A SoC Overview -------------------- Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A SoC overview. LS1012AFRDM board Overview ----------------------- - SERDES Connections, 2 lanes supportingspeeds upto 1 Gbit/s - 2 SGMII 1G PHYs - DDR Controller - 4 Gb DDR3L SDRAM memory, running at data rates up to 1 GT/s operating at 1.35 V - QSPI - Onboard 512 Mbit QSPI flash memory running at speed up to 108/54 MHz - One high-speed USB 2.0/3.0 port, one USB 2.0 port - USB 2.0/3.0 port is configured as On-The-Go (OTG) with a Micro-AB connector. - USB 2.0 port is a debug port (CMSIS DAP) and is configured as a Micro-AB device. - I2C controller - One I2C bus with connectivity to Arduino headers - UART - UART (Console): UART1 (Without flow control) for console - ARM JTAG support - ARM Cortex® 10-pin JTAG connector for LS1012A - CMSIS DAP through K20 microcontroller - SAI Audio interface - One SAI port, SAI 2 with full duplex support - Clocks - 25 MHz crystal for LS1012A - 8 MHz Crystal for K20 - 24 MHz for SC16IS740IPW SPI to Dual UART bridge - Power Supplies - 5 V input supply from USB - 0.9 V, 1.35 V, and 1.8 V for VDD/Core, DDR, I/O, and other board interfaces Booting Options --------------- QSPI Flash 1 QSPI flash map -------------- Images | Size |QSPI Flash Address ------------------------------------------ RCW + PBI | 1MB | 0x4000_0000 U-boot | 1MB | 0x4010_0000 U-boot Env | 1MB | 0x4020_0000 PPA FIT image | 2MB | 0x4050_0000 Linux ITB | ~53MB | 0x40A0_0000