u-boot-brain/arch/riscv
Neil Armstrong ffd4c7c2ec dts: switch spi-flash to jedec, spi-nor compatible
There is no reason not to use the Linux "jedec,spi-nor" binding in U-Boot
dts files. This compatible has been added in sf_probe, let use it.

This patch switches to jedec,spi-nor when spi-flash is used in the DTS
and DTSI files, and removed spi-flash when jedec,spi-nor is already
present.

The x86 dts are switched in a separate commit since it depends on a change
in fdtdec.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Evgeniy Paltsev <paltsev@synopsys.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Patrick Delaunay <Patrick.delaunay@st.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-04-12 10:54:27 +05:30
..
cpu riscv: ax25: Andes specific cache shall only support in M-mode 2019-04-08 09:45:08 +08:00
dts dts: switch spi-flash to jedec, spi-nor compatible 2019-04-12 10:54:27 +05:30
include/asm riscv: Add a SYSCON driver for Andestech's PLMT 2019-04-08 09:45:08 +08:00
lib riscv: Add a SYSCON driver for Andestech's PLMT 2019-04-08 09:45:08 +08:00
config.mk riscv: qemu: define standalone load address 2019-01-15 09:36:31 +08:00
Kconfig riscv: Add a SYSCON driver for Andestech's PLMT 2019-04-08 09:45:08 +08:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00