mirror of
https://github.com/brain-hackers/u-boot-brain
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0d8a749950
FEC does not work on the i.mx51/53evk board, it will hangup
In: serial
Out: serial
Err: serial
Net:
After bisect, it due to the following commit:
be252b6 net: imx: Add multi-FEC support for imx_get_mac_from_fuse
has change the imx_get_mac_from_fuse fucntion prototype, but fail
to update i.mx5, here it does it.
After apply this patch, u-boot works again on i.mx51/53 evk boards.
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
118 lines
2.8 KiB
C
118 lines
2.8 KiB
C
/*
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* (C) Copyright 2007
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* Sascha Hauer, Pengutronix
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*
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* (C) Copyright 2009 Freescale Semiconductor, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/errno.h>
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#include <asm/io.h>
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#if !(defined(CONFIG_MX51) || defined(CONFIG_MX53))
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#error "CPU_TYPE not defined"
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#endif
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u32 get_cpu_rev(void)
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{
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#ifdef CONFIG_MX51
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int system_rev = 0x51000;
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#else
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int system_rev = 0x53000;
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#endif
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int reg = __raw_readl(ROM_SI_REV);
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#if defined(CONFIG_MX51)
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switch (reg) {
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case 0x02:
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system_rev |= CHIP_REV_1_1;
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break;
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case 0x10:
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if ((__raw_readl(GPIO1_BASE_ADDR + 0x0) & (0x1 << 22)) == 0)
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system_rev |= CHIP_REV_2_5;
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else
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system_rev |= CHIP_REV_2_0;
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break;
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case 0x20:
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system_rev |= CHIP_REV_3_0;
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break;
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default:
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system_rev |= CHIP_REV_1_0;
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break;
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}
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#else
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if (reg < 0x20)
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system_rev |= CHIP_REV_1_0;
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else
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system_rev |= reg;
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#endif
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return system_rev;
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}
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#if defined(CONFIG_FEC_MXC)
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void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
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{
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int i;
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struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
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struct fuse_bank *bank = &iim->bank[1];
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struct fuse_bank1_regs *fuse =
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(struct fuse_bank1_regs *)bank->fuse_regs;
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for (i = 0; i < 6; i++)
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mac[i] = readl(&fuse->mac_addr[i]) & 0xff;
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}
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#endif
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void set_chipselect_size(int const cs_size)
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{
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unsigned int reg;
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struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
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reg = readl(&iomuxc_regs->gpr1);
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switch (cs_size) {
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case CS0_128:
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reg &= ~0x7; /* CS0=128MB, CS1=0, CS2=0, CS3=0 */
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reg |= 0x5;
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break;
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case CS0_64M_CS1_64M:
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reg &= ~0x3F; /* CS0=64MB, CS1=64MB, CS2=0, CS3=0 */
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reg |= 0x1B;
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break;
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case CS0_64M_CS1_32M_CS2_32M:
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reg &= ~0x1FF; /* CS0=64MB, CS1=32MB, CS2=32MB, CS3=0 */
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reg |= 0x4B;
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break;
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case CS0_32M_CS1_32M_CS2_32M_CS3_32M:
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reg &= ~0xFFF; /* CS0=32MB, CS1=32MB, CS2=32MB, CS3=32MB */
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reg |= 0x249;
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break;
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default:
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printf("Unknown chip select size: %d\n", cs_size);
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break;
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}
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writel(reg, &iomuxc_regs->gpr1);
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}
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