mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-20 01:57:59 +09:00
70ad375ee4
This renames all the Tegra20 pinmux pins and functions so they have a prefix which matches the type name. The entries in tegra20_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
36 lines
838 B
C
36 lines
838 B
C
/*
|
|
* Copyright (C) 2012 Lucas Stach
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <asm/arch/clock.h>
|
|
#include <asm/arch/funcmux.h>
|
|
#include <asm/arch/pinmux.h>
|
|
#include <asm/arch-tegra/board.h>
|
|
|
|
#include "colibri_t20-common.h"
|
|
|
|
#ifdef CONFIG_USB_EHCI_TEGRA
|
|
void colibri_t20_common_pin_mux_usb(void)
|
|
{
|
|
/* module internal USB bus to connect ethernet chipset */
|
|
funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
|
|
/* ULPI reference clock output */
|
|
pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
|
|
pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
|
|
/* PHY reset GPIO */
|
|
pinmux_tristate_disable(PMUX_PINGRP_UAC);
|
|
/* VBus GPIO */
|
|
pinmux_tristate_disable(PMUX_PINGRP_DTE);
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_TEGRA_NAND
|
|
void pin_mux_nand(void)
|
|
{
|
|
funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT);
|
|
}
|
|
#endif
|