mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-22 01:48:52 +09:00
![Simon Glass](/assets/img/avatar_default.png)
At present we go through various contortions to store the SPI slave's chip select in its private data. This only exists when the slave is active so must be set up when it is probed. Until the device is probed we don't actually know what chip select it will appear on. However, now that we can support per-child platform data, we can use that instead. This allows us to set up the chip select when the child is bound, and avoid the messy contortions. Unfortunately this is a fairly large change and it seems to be difficult to break it down further. Signed-off-by: Simon Glass <sjg@chromium.org>
237 lines
5.3 KiB
C
237 lines
5.3 KiB
C
/*
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* Copyright (c) 2014 Google, Inc
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*
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* (C) Copyright 2002
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* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
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*
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* Influenced by code from:
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <malloc.h>
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#include <spi.h>
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#include <asm/gpio.h>
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DECLARE_GLOBAL_DATA_PTR;
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struct soft_spi_platdata {
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struct gpio_desc cs;
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struct gpio_desc sclk;
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struct gpio_desc mosi;
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struct gpio_desc miso;
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int spi_delay_us;
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};
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struct soft_spi_priv {
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unsigned int mode;
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};
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static int soft_spi_scl(struct udevice *dev, int bit)
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{
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struct soft_spi_platdata *plat = dev->platdata;
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dm_gpio_set_value(&plat->sclk, bit);
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return 0;
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}
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static int soft_spi_sda(struct udevice *dev, int bit)
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{
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struct soft_spi_platdata *plat = dev->platdata;
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dm_gpio_set_value(&plat->mosi, bit);
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return 0;
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}
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static int soft_spi_cs_activate(struct udevice *dev)
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{
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struct soft_spi_platdata *plat = dev->platdata;
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dm_gpio_set_value(&plat->cs, 0);
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dm_gpio_set_value(&plat->sclk, 0);
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dm_gpio_set_value(&plat->cs, 1);
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return 0;
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}
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static int soft_spi_cs_deactivate(struct udevice *dev)
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{
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struct soft_spi_platdata *plat = dev->platdata;
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dm_gpio_set_value(&plat->cs, 0);
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return 0;
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}
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static int soft_spi_claim_bus(struct udevice *dev)
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{
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/*
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* Make sure the SPI clock is in idle state as defined for
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* this slave.
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*/
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return soft_spi_scl(dev, 0);
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}
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static int soft_spi_release_bus(struct udevice *dev)
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{
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/* Nothing to do */
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return 0;
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}
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/*-----------------------------------------------------------------------
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* SPI transfer
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*
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* This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
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* "bitlen" bits in the SPI MISO port. That's just the way SPI works.
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*
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* The source of the outgoing bits is the "dout" parameter and the
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* destination of the input bits is the "din" parameter. Note that "dout"
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* and "din" can point to the same memory location, in which case the
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* input data overwrites the output data (since both are buffered by
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* temporary variables, this is OK).
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*/
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static int soft_spi_xfer(struct udevice *dev, unsigned int bitlen,
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const void *dout, void *din, unsigned long flags)
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{
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struct soft_spi_priv *priv = dev_get_priv(dev);
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struct soft_spi_platdata *plat = dev->platdata;
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uchar tmpdin = 0;
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uchar tmpdout = 0;
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const u8 *txd = dout;
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u8 *rxd = din;
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int cpha = priv->mode & SPI_CPHA;
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unsigned int j;
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debug("spi_xfer: slave %s:%s dout %08X din %08X bitlen %u\n",
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dev->parent->name, dev->name, *(uint *)txd, *(uint *)rxd,
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bitlen);
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if (flags & SPI_XFER_BEGIN)
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soft_spi_cs_activate(dev);
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for (j = 0; j < bitlen; j++) {
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/*
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* Check if it is time to work on a new byte.
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*/
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if ((j % 8) == 0) {
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if (txd)
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tmpdout = *txd++;
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else
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tmpdout = 0;
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if (j != 0) {
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if (rxd)
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*rxd++ = tmpdin;
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}
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tmpdin = 0;
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}
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if (!cpha)
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soft_spi_scl(dev, 0);
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soft_spi_sda(dev, tmpdout & 0x80);
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udelay(plat->spi_delay_us);
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if (cpha)
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soft_spi_scl(dev, 0);
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else
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soft_spi_scl(dev, 1);
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tmpdin <<= 1;
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tmpdin |= dm_gpio_get_value(&plat->miso);
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tmpdout <<= 1;
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udelay(plat->spi_delay_us);
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if (cpha)
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soft_spi_scl(dev, 1);
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}
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/*
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* If the number of bits isn't a multiple of 8, shift the last
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* bits over to left-justify them. Then store the last byte
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* read in.
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*/
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if (rxd) {
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if ((bitlen % 8) != 0)
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tmpdin <<= 8 - (bitlen % 8);
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*rxd++ = tmpdin;
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}
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if (flags & SPI_XFER_END)
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soft_spi_cs_deactivate(dev);
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return 0;
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}
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static int soft_spi_set_speed(struct udevice *dev, unsigned int speed)
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{
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/* Accept any speed */
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return 0;
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}
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static int soft_spi_set_mode(struct udevice *dev, unsigned int mode)
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{
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struct soft_spi_priv *priv = dev_get_priv(dev);
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priv->mode = mode;
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return 0;
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}
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static const struct dm_spi_ops soft_spi_ops = {
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.claim_bus = soft_spi_claim_bus,
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.release_bus = soft_spi_release_bus,
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.xfer = soft_spi_xfer,
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.set_speed = soft_spi_set_speed,
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.set_mode = soft_spi_set_mode,
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};
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static int soft_spi_ofdata_to_platdata(struct udevice *dev)
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{
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struct soft_spi_platdata *plat = dev->platdata;
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const void *blob = gd->fdt_blob;
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int node = dev->of_offset;
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plat->spi_delay_us = fdtdec_get_int(blob, node, "spi-delay-us", 0);
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return 0;
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}
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static int soft_spi_probe(struct udevice *dev)
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{
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struct spi_slave *slave = dev_get_parentdata(dev);
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struct soft_spi_platdata *plat = dev->platdata;
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int cs_flags, clk_flags;
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cs_flags = (slave->mode & SPI_CS_HIGH) ? 0 : GPIOD_ACTIVE_LOW;
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clk_flags = (slave->mode & SPI_CPOL) ? GPIOD_ACTIVE_LOW : 0;
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if (gpio_request_by_name(dev, "cs-gpio", 0, &plat->cs,
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GPIOD_IS_OUT | cs_flags) ||
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gpio_request_by_name(dev, "sclk-gpio", 0, &plat->sclk,
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GPIOD_IS_OUT | clk_flags) ||
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gpio_request_by_name(dev, "mosi-gpio", 0, &plat->mosi,
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GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE) ||
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gpio_request_by_name(dev, "miso-gpio", 0, &plat->miso,
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GPIOD_IS_IN))
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return -EINVAL;
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return 0;
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}
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static const struct udevice_id soft_spi_ids[] = {
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{ .compatible = "u-boot,soft-spi" },
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{ }
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};
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U_BOOT_DRIVER(soft_spi) = {
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.name = "soft_spi",
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.id = UCLASS_SPI,
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.of_match = soft_spi_ids,
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.ops = &soft_spi_ops,
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.ofdata_to_platdata = soft_spi_ofdata_to_platdata,
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.platdata_auto_alloc_size = sizeof(struct soft_spi_platdata),
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.priv_auto_alloc_size = sizeof(struct soft_spi_priv),
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.probe = soft_spi_probe,
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};
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