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![Axel Lin](/assets/img/avatar_default.png)
Staticize local functions in mxs_auart driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Marek Vasut <marex@denx.de>
152 lines
3.9 KiB
C
152 lines
3.9 KiB
C
/*
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* Freescale i.MX23/i.MX28 AUART driver
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*
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* Copyright (C) 2013 Andreas Wass <andreas.wass@dalelven.com>
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*
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* Based on the MXC serial driver:
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*
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* (c) 2007 Sascha Hauer <s.hauer@pengutronix.de>
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*
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* Further based on the Linux mxs-auart.c driver:
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*
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* Freescale STMP37XX/STMP38X Application UART drkiver
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* Copyright 2008-2010 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <serial.h>
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#include <linux/compiler.h>
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#include <asm/arch/regs-base.h>
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#include <asm/arch/regs-uartapp.h>
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#include <asm/arch/sys_proto.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifndef CONFIG_MXS_AUART_BASE
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#error "CONFIG_MXS_AUART_BASE must be set to the base UART to use"
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#endif
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/* AUART clock always supplied by XTAL and always 24MHz */
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#define MXS_AUART_CLK 24000000
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static struct mxs_uartapp_regs *get_uartapp_registers(void)
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{
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return (struct mxs_uartapp_regs *)CONFIG_MXS_AUART_BASE;
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}
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/**
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* Sets the baud rate and settings.
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* The settings are: 8 data bits, no parit and 1 stop bit.
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*/
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static void mxs_auart_setbrg(void)
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{
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u32 div;
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u32 linectrl = 0;
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struct mxs_uartapp_regs *regs = get_uartapp_registers();
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if (!gd->baudrate)
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gd->baudrate = CONFIG_BAUDRATE;
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/*
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* From i.MX28 datasheet:
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* div is calculated by calculating UARTCLK*32/baudrate, rounded to int
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* div must be between 0xEC and 0x003FFFC0 inclusive
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* Lowest 6 bits of div goes in BAUD_DIVFRAC part of LINECTRL register
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* Next 16 bits goes in BAUD_DIVINT part of LINECTRL register
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*/
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div = (MXS_AUART_CLK * 32) / gd->baudrate;
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if (div < 0xEC || div > 0x003FFFC0)
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return;
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linectrl |= ((div & UARTAPP_LINECTRL_EXTRACT_BAUD_DIVFRAC_MASK) <<
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UARTAPP_LINECTRL_BAUD_DIVFRAC_OFFSET) &
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UARTAPP_LINECTRL_BAUD_DIVFRAC_MASK;
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linectrl |= ((div >> UARTAPP_LINECTRL_EXTRACT_BAUD_DIVINT_OFFSET) <<
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UARTAPP_LINECTRL_BAUD_DIVINT_OFFSET) &
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UARTAPP_LINECTRL_BAUD_DIVINT_MASK;
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/* Word length: 8 bits */
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linectrl |= UARTAPP_LINECTRL_WLEN_8BITS;
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/* Enable FIFOs. */
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linectrl |= UARTAPP_LINECTRL_FEN_MASK;
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/* Write above settings, no parity, 1 stop bit */
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writel(linectrl, ®s->hw_uartapp_linectrl);
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}
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static int mxs_auart_init(void)
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{
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struct mxs_uartapp_regs *regs = get_uartapp_registers();
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/* Reset everything */
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mxs_reset_block(®s->hw_uartapp_ctrl0_reg);
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/* Disable interrupts */
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writel(0, ®s->hw_uartapp_intr);
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/* Set baud rate and settings */
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serial_setbrg();
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/* Disable RTS and CTS, ignore LINECTRL2 register */
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writel(UARTAPP_CTRL2_RTSEN_MASK |
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UARTAPP_CTRL2_CTSEN_MASK |
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UARTAPP_CTRL2_USE_LCR2_MASK,
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®s->hw_uartapp_ctrl2_clr);
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/* Enable receiver, transmitter and UART */
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writel(UARTAPP_CTRL2_RXE_MASK |
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UARTAPP_CTRL2_TXE_MASK |
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UARTAPP_CTRL2_UARTEN_MASK,
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®s->hw_uartapp_ctrl2_set);
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return 0;
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}
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static void mxs_auart_putc(const char c)
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{
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struct mxs_uartapp_regs *regs = get_uartapp_registers();
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/* Wait in loop while the transmit FIFO is full */
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while (readl(®s->hw_uartapp_stat) & UARTAPP_STAT_TXFF_MASK)
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;
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writel(c, ®s->hw_uartapp_data);
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if (c == '\n')
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mxs_auart_putc('\r');
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}
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static int mxs_auart_tstc(void)
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{
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struct mxs_uartapp_regs *regs = get_uartapp_registers();
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/* Checks if receive FIFO is empty */
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return !(readl(®s->hw_uartapp_stat) & UARTAPP_STAT_RXFE_MASK);
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}
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static int mxs_auart_getc(void)
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{
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struct mxs_uartapp_regs *regs = get_uartapp_registers();
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/* Wait until a character is available to read */
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while (!mxs_auart_tstc())
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;
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/* Read the character from the data register */
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return readl(®s->hw_uartapp_data) & 0xFF;
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}
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static struct serial_device mxs_auart_drv = {
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.name = "mxs_auart_serial",
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.start = mxs_auart_init,
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.stop = NULL,
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.setbrg = mxs_auart_setbrg,
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.putc = mxs_auart_putc,
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.puts = default_serial_puts,
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.getc = mxs_auart_getc,
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.tstc = mxs_auart_tstc,
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};
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void mxs_auart_initialize(void)
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{
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serial_register(&mxs_auart_drv);
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}
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__weak struct serial_device *default_serial_console(void)
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{
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return &mxs_auart_drv;
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}
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