Laurentiu Tudor aef654a2ed armv8: fsl-layerscape: make icid setup endianness aware ... The current implementation assumes that the registers holding the ICIDs are universally big endian. That's no longer the case on newer platforms so update the code to take into account the endianness of each register. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>		2019-08-22 09:07:36 +05:30
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asm	armv8: fsl-layerscape: make icid setup endianness aware	2019-08-22 09:07:36 +05:30
debug	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00