mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 18:56:15 +09:00
86cf1c8285
We have the following cases: - CONFIG_NR_DRAM_BANKS was defined, migrate normally - CONFIG_NR_DRAM_BANKS_MAX was defined and then used for CONFIG_NR_DRAM_BANKS after a check, just migrate it over now. - CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 + 2), set this to 8. Signed-off-by: Tom Rini <trini@konsulko.com>
82 lines
2.1 KiB
C
82 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2010
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* Marvell Semiconductor <www.marvell.com>
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* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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*/
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/*
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* This file contains Marvell Board Specific common defincations.
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* This file should be included in board config header file.
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*
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* It supports common definations for Kirkwood platform
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* TBD: support for Orion5X platforms
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*/
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#ifndef _MV_COMMON_H
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#define _MV_COMMON_H
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/*
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_MARVELL 1
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/*
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* Custom CONFIG_SYS_TEXT_BASE can be done in <board>.h
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*/
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/* additions for new ARM relocation support */
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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/*
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* NS16550 Configuration
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*/
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
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#if !defined(CONFIG_DM_SERIAL)
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE
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#endif
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/* auto boot */
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#define CONFIG_PREBOOT
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
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#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 * 4) /* 4MiB for malloc() */
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/*
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* Other required minimal configurations
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*/
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#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
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#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
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#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
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#define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */
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#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
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#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
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/* ====> Include platform Common Definitions */
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#include <asm/arch/config.h>
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/* ====> Include driver Common Definitions */
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/*
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* Common NAND configuration
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*/
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#endif
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#endif /* _MV_COMMON_H */
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